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JPS5952665U - hybrid integrated circuit - Google Patents

hybrid integrated circuit

Info

Publication number
JPS5952665U
JPS5952665U JP14672182U JP14672182U JPS5952665U JP S5952665 U JPS5952665 U JP S5952665U JP 14672182 U JP14672182 U JP 14672182U JP 14672182 U JP14672182 U JP 14672182U JP S5952665 U JPS5952665 U JP S5952665U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
abstract
substrate
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14672182U
Other languages
Japanese (ja)
Inventor
忠義 高橋
Original Assignee
富士電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士電機株式会社 filed Critical 富士電機株式会社
Priority to JP14672182U priority Critical patent/JPS5952665U/en
Publication of JPS5952665U publication Critical patent/JPS5952665U/en
Pending legal-status Critical Current

Links

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  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例、第2図は本考案の一実施例、第3図は
本考案の他の実施例を示し、それぞれ図においてaは樹
脂封止前の混成集積回路の斜視図、bは樹脂封止後の混
成集積回路の一部切り欠き平面図、Cは混成集積回路の
一部断面図を示す。 1、 8. 10・・・基板、2・・・電子部品、3・
・・端子リード、4・・・樹脂、9・・・スリット、1
1・・・孔。
FIG. 1 shows a conventional example, FIG. 2 shows an embodiment of the present invention, and FIG. 3 shows another embodiment of the present invention. In each figure, a is a perspective view of the hybrid integrated circuit before resin encapsulation, and b C shows a partially cutaway plan view of the hybrid integrated circuit after resin sealing, and C shows a partially sectional view of the hybrid integrated circuit. 1, 8. 10... Board, 2... Electronic component, 3.
...Terminal lead, 4...Resin, 9...Slit, 1
1...hole.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 配線導体が形成された基板に電子部品を搭載し、樹脂に
より被覆してなるものにおいて、前記基板の、電子部品
の電極間に位置する部分にスリットまたは孔を設けたこ
とを特徴とする混成集積回路。
A hybrid assembly in which electronic components are mounted on a substrate on which wiring conductors are formed and covered with resin, characterized in that a slit or hole is provided in a portion of the substrate located between the electrodes of the electronic component. circuit.
JP14672182U 1982-09-28 1982-09-28 hybrid integrated circuit Pending JPS5952665U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14672182U JPS5952665U (en) 1982-09-28 1982-09-28 hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14672182U JPS5952665U (en) 1982-09-28 1982-09-28 hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS5952665U true JPS5952665U (en) 1984-04-06

Family

ID=30326503

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14672182U Pending JPS5952665U (en) 1982-09-28 1982-09-28 hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS5952665U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011204426A (en) * 2010-03-25 2011-10-13 Panasonic Corp Power supply for driving magnetron

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011204426A (en) * 2010-03-25 2011-10-13 Panasonic Corp Power supply for driving magnetron

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