JPS5942770Y2 - Terminal for multiplex transmission system - Google Patents
Terminal for multiplex transmission systemInfo
- Publication number
- JPS5942770Y2 JPS5942770Y2 JP10648979U JP10648979U JPS5942770Y2 JP S5942770 Y2 JPS5942770 Y2 JP S5942770Y2 JP 10648979 U JP10648979 U JP 10648979U JP 10648979 U JP10648979 U JP 10648979U JP S5942770 Y2 JPS5942770 Y2 JP S5942770Y2
- Authority
- JP
- Japan
- Prior art keywords
- address
- setting
- switch
- chip
- transmission system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Time-Division Multiplex Systems (AREA)
- Communication Control (AREA)
Description
【考案の詳細な説明】
本考案に各端末器毎にその設置工事の終了時にチップに
よりアドレス設定を行うようにした多重伝送システムの
端末器に関するものである。[Detailed Description of the Invention] The present invention relates to a terminal device for a multiplex transmission system in which an address is set using a chip at the end of installation work for each terminal device.
第1図は埋込型配線器具と同形状に形成された端末器の
一例を示し、制御操作用の押釦6・・・を配設した押釦
突設台7の側部の器体11上面には挿入用スリット1が
設されており、この挿入用スリット1の内部には、例
えば第2図に示すようなプリント板8上に植設された接
点ばね9とこの接点ばね9先端が当接する接点10とよ
りなるアドレス設定スイッチ3□3゜・・・・・・が、
アドレスデータの各ビットに対応して配設されている。FIG. 1 shows an example of a terminal device formed in the same shape as an embedded wiring device, and is mounted on the upper surface of the device body 11 on the side of a push button protruding base 7 on which push buttons 6 for control operations are arranged. An insertion slit 1 is provided, and the tip of the contact spring 9 comes into contact with a contact spring 9 planted on a printed board 8 as shown in FIG. 2, for example. The address setting switch 3□3゜ consisting of the contact 10 is
They are arranged corresponding to each bit of address data.
チップ4は図示のようにくし歯状に穴出部4aと凹部4
bとを有して構成され、突出部4aを接点ばね9と接点
10との間に挿入することによりオフ設定を行うもので
あり、各端末器毎にそのチップの突出部4aと凹部4b
との凹凸状態を変え、もって夫々のアドレス設定ができ
るようにしである。The chip 4 has a comb-shaped hole portion 4a and a recessed portion 4 as shown in the figure.
b, and the off setting is performed by inserting the protruding part 4a between the contact spring 9 and the contact 10, and the protruding part 4a and the recessed part 4b of the chip are configured for each terminal device.
By changing the concave and convex state of the surface, each address can be set.
しかしてかかる従来例にあってはチップ4を挿入用スリ
ット1に挿入するだけでアドレス設定を行うことができ
るものであるが、逆にあ筐りにも簡単な操作であるため
チップ4の挿入を忘れ、アドレス設定を行なわないit
、第3図のように端末器器体11の周囲に配設したプに
一ト枠12にプレート13を被設してしまうおそれがあ
った。However, in such a conventional example, address setting can be performed simply by inserting the chip 4 into the insertion slit 1; If you forget it and do not set the address
As shown in FIG. 3, there was a risk that the plate 13 would be placed over the frame 12 around the terminal device body 11.
このような場合端末器は全く動作しないため、チップ4
挿入によるアドレス設定を行う必要があるが、この場合
再びプレート13を外すのに手数を要し、作業が面倒で
ある問題があった。In such a case, the terminal will not work at all, so the chip 4
It is necessary to set the address by inserting the plate 13, but in this case there is a problem in that it takes time and effort to remove the plate 13 again, making the work cumbersome.
本考案は上述の点に鑑みて提供したものであって、アド
レスを設定し忘れた場合これを自動的に表示することが
できるようにし、プレート被設前にアドレス設定忘れを
検知できるようにすることによりプレートを取外してア
ドレス設定を行うような煩雑な作業の必要が起ることが
ないようにした多重伝送システムの端末器を提供するこ
とを目的とするものである。The present invention has been proposed in view of the above points, and it is possible to automatically display this if you forget to set the address, so that forgetting to set the address can be detected before the plate is installed. It is an object of the present invention to provide a terminal device for a multiplex transmission system which eliminates the need for complicated work such as removing a plate and setting an address.
以下本考案を実施例図により詳述する。The present invention will be explained in detail below with reference to embodiment figures.
第4図は本考案実施例のブロック図を示し、ダイオード
ブリッジ14出力を電源回路15で安定化した出力によ
り作動する信号処理回路16に各アドレス設定スイッチ
3□32・・・・・・を接続するに際し、これらアドレ
ス設定スイッチ3□3゜・・・・・・に1個の設定確認
スイッチ5を並設し、この設定確認スイッチ5が操作さ
れたときにのみ信号処理回路16が作動して各動作表示
灯17・・・を点灯するようにしてあり、これら動作表
示灯12・・・が不点灯であることによりアドレス設定
忘れの表示が行なわれるようにしである。FIG. 4 shows a block diagram of an embodiment of the present invention, in which each address setting switch 3□32... is connected to a signal processing circuit 16 which is operated by the output of a diode bridge 14 stabilized by a power supply circuit 15. When doing so, one setting confirmation switch 5 is arranged in parallel with these address setting switches 3□3゜..., and the signal processing circuit 16 is activated only when this setting confirmation switch 5 is operated. Each operation indicator light 17... is turned on, and when these operation indicator lights 12... are not lit, an indication that the address setting has been forgotten is made.
ここでアドレス設定スイッチ3□3□・・・・・・及び
設定確認スイッチ5は前記第2図のもののようにプリン
ト板8上に並列して形成したものでも良いが、例えば第
5図に示すようにマイクロスイッチを並列に配列して構
成したものでも良い。Here, the address setting switch 3□3□... and the setting confirmation switch 5 may be formed in parallel on the printed board 8 like the one shown in FIG. 2, but for example, as shown in FIG. It may also be configured by arranging microswitches in parallel, as shown in FIG.
一方チツブ4はアドレス設定スイッチ3□3゜・・・・
・・配列における設定確認スィッチ5配列側に常に設定
確認操作部4cを有するように形成されており、従って
器体11の挿入用スリット1にチップ4を挿入してアド
レス設定を行ったときには常に設定確認スイッチ5のア
クチュエータ18が設定確認操作部4cにより押し操作
され、アドレス設定の確認が行なわれるものであり、チ
ップ4の凹部4bに対応したアドレス設定スイッチ3□
3□・・・・・・のアクチュエータ13は操作されず、
これらアドレス設定スイッチ3□3゜・・・・・・はオ
フ状態に設定される。On the other hand, for chip 4, address setting switch 3□3゜...
...The setting confirmation switch 5 in the array is always provided with a setting confirmation operation part 4c on the array side, so when the chip 4 is inserted into the insertion slit 1 of the device body 11 and address setting is performed, the setting is always confirmed. The actuator 18 of the confirmation switch 5 is pressed by the setting confirmation operation section 4c to confirm the address setting, and the address setting switch 3 □ corresponding to the recess 4b of the chip 4 is pressed.
The actuators 13 of 3□... are not operated,
These address setting switches 3□3° . . . are set to the off state.
なお設定確認スィッチ5自体を電源スィッチとしても良
い。Note that the setting confirmation switch 5 itself may be used as a power switch.
本考案は上述のように構成したものであるから、プレー
トの被設を行う前にアドレス設定を行ったか否かの確認
を行うことができ、プレート被設後にアドレス設定忘れ
に気づいて再びプレートを外してチップの挿入を行うよ
うな手数を要することがなく、端末器の設置工事が簡易
化される利点を有するものである。Since the present invention is configured as described above, it is possible to confirm whether or not the address has been set before installing the plate, so that it is possible to check whether the address has been set or not after installing the plate, and to try again when realizing that the address has been set after the plate is installed. This has the advantage of simplifying the installation work of the terminal without requiring the trouble of removing it and inserting the chip.
第1図は従来例の斜視図、第2図は同上のアドレス設定
スイッチ部の要部斜視図、第3図は同上のプレート被設
直前の縮小斜視図、第4図は本考案実施例のブロック図
、第5図は同上のアドレス設定スイッチとチップとの関
係を示す斜視図、第6図は同上のチップによるアドレス
設定状態を示す要部断面図であり、1は挿入用スリット
、3□3233・・・・・・はアドレス設定スイッチ、
4はチップ、5は設定確認スイッチである。Fig. 1 is a perspective view of the conventional example, Fig. 2 is a perspective view of the main part of the address setting switch section of the same as above, Fig. 3 is a reduced perspective view of the same as above just before the plate is installed, and Fig. 4 is of the embodiment of the present invention. The block diagram, FIG. 5 is a perspective view showing the relationship between the address setting switch and the chip, and FIG. 6 is a sectional view of the main part showing the address setting state by the chip, 1 is an insertion slit, 3 □ 3233... is the address setting switch,
4 is a chip, and 5 is a setting confirmation switch.
Claims (1)
応するアドレス設定スイッチを配置し、設定スべきアド
レスデータに対応して形成したチップを上記挿入用スリ
ットに挿入して適宜アドレス設定スイッチを操作するこ
とによりアドレス設定を行うようにした多重伝送システ
ムの端末器において、アドレス設定スイッチに並列して
設定確認スイッチを配設し、各チップに形成した設定確
認操作部によりチップの挿入用スリット挿入時にこの設
定確認スイッチを操作し、設定確認スイッチの非操作時
に設定忘れ表示を行うようにして成る多重伝送システム
の端末器。An address setting switch corresponding to each bit of the address data is arranged inside the insertion slit, and a chip formed corresponding to the address data to be set is inserted into the insertion slit and the address setting switch is turned on as appropriate. In a terminal device for a multiplex transmission system in which addresses are set by operation, a setting confirmation switch is arranged in parallel with the address setting switch, and a setting confirmation operation section formed on each chip allows insertion of the chip into a slit. A terminal device for a multiplex transmission system that is configured to operate this setting confirmation switch at times, and display a forgotten setting display when the setting confirmation switch is not operated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10648979U JPS5942770Y2 (en) | 1979-07-31 | 1979-07-31 | Terminal for multiplex transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10648979U JPS5942770Y2 (en) | 1979-07-31 | 1979-07-31 | Terminal for multiplex transmission system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5626453U JPS5626453U (en) | 1981-03-11 |
JPS5942770Y2 true JPS5942770Y2 (en) | 1984-12-15 |
Family
ID=29339132
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10648979U Expired JPS5942770Y2 (en) | 1979-07-31 | 1979-07-31 | Terminal for multiplex transmission system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5942770Y2 (en) |
-
1979
- 1979-07-31 JP JP10648979U patent/JPS5942770Y2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5626453U (en) | 1981-03-11 |
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