JPS5932211A - Slice circuit - Google Patents

Abstract

PURPOSE:To make the slice level adjustable, by using two amplifiers having a different saturation level and forming them so as to give an output in opposite phase and at the same level. CONSTITUTION:A differential amplifier 1 consists of a constant current source I1, differential transistors (TRs) Q1, Q2 and cascode TRs Q3, Q4. Further, a differential amplifier 2 comprises differential TRs Q7, Q8 and a constant current source I2, and this input is a signal obtained at both ends of resistors R3, R4 of the amplifier 1. Further, the output of both amplifiers is made common and a collector common output of the TRs Q4, Q8 is led out as the slice output. The output of both amplifiers is opposite in phase and the level is the same by setting the gain of both amplifiers equal to each other through the constitution above. Further, the circuit acts like a slice circuit in setting the saturation level of both amplifiers different. Thus, the slice level is adjusted with the adjustment of the saturation level.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a slicing circuit, and more particularly to a current slicing circuit configured with a differential knob.

A typical example of a slice circuit is a diode slicer, and a specific circuit thereof is shown in FIG. The input signal to be sliced is connected to the capacitor C for DC blocking 11.
is applied to the resistor R, via the resistor R. The voltage across this resistor R is applied to a diode parallel circuit consisting of diodes DI and D2 and a series connection configuration of the resistor R2.
Slice output can be obtained at both ends.

In this circuit, the voltage appearing across the resistor R, is -0,7
V (forward voltage of the diode) to 10 g and 7V, both diodes D1. D2 are both in the off state,
In other ranges, it is in the on state. Therefore, Fig. 2 (
In the case of an input signal waveform as shown in A), it is sliced with a slice level of ±0.7V to obtain an output waveform as shown in FIG. 2B.

In the circuit shown in FIG. 1, the slice level is fixed at a constant value of ±0.7 V, and therefore, if the human input signal is minute, it is necessary to amplify the voltage to the slice level or higher. A signal whose level has been increased by voltage amplification has a disadvantage in that it does not adversely affect other circuits due to stray capacitance or unnecessary radiation in the circuit.

The present invention has been made to eliminate the above-mentioned drawbacks of the prior art, and its purpose is to provide a slicing circuit whose slicing level can be freely adjusted.

Another object of the present invention is to provide a current slicing circuit that can perform slicing while changing the current of a signal and does not require voltage amplification.

The slicing circuit according to the present invention includes first and second amplifiers that generate a pair of outputs that are in phase and opposite phase with respect to a human input signal and have the same level, and saturation of the first amplifier and the second amplifier is provided. It is characterized by having different levels, and the output of both amplifiers is a common slice output.

Preferably, if the first and second amplifiers are configured as differential amplifiers to perform current amplification processing, a current slicer can be performed without requiring voltage amplification, and an adverse effect on other circuits can be prevented. .

The present invention will be explained below using the drawings.

FIG. 3 is a circuit diagram of an embodiment of the present invention, and is an example of a differential amplifier configuration. The first differential amplifier l which is the first amplifier
consists of a constant current differential transistor QI r Q2 and a cascode transistor Q3 + "4, and transistors Q1 and 93 and transistors Q2 and Q
4 are connected in cascode above the resistors R3 and R4, respectively. A reference voltage is applied to each base of the cascode transistors Q3 + Q4, and both transistors Q3 + Q
A current mirror circuit, which is an active load, is connected to the collector of No. 4. The current mirror circuit consists of transistors Q5 + Q6 and resistors R5 + R6.

The second differential amplifier 2 t;I: consists of differential transistors Q7 + Q8 and a constant current source 2, and its input is connected to both ends of the resistors R3 + R4 of the first differential amplifier. This is the signal obtained. In a configuration in which the outputs of both amplifiers are common and the common output of the collectors of transistors Q4 and Q8 is derived as the slice output OUT, both signals obtained at the collectors of transistors Q3 and Q7 are They are out of phase with each other, and both signals obtained at the collectors of the switched i-transistor Q4 and transistor Q8 are also out of phase with each other. Therefore, if the gain of each amplifier is set so that the levels of both amplifier outputs are equal, no side tube signal is generated at the circuit output OUT because the signals are canceled by the mutually opposite phase outputs.

If the current source current I2 of the second amplifier is set to 1\\ than the current II of the current source of the first amplifier, and the resistors R3 and IZ4 are set to appropriate values, dj, when the level of human power 1g increases. The output of the second amplifier 2 will saturate quickly, and if the signal level increases from then on, the output of the first amplifier 1 will not be canceled by the output of the second amplifier, and the circuit It will be derived to the output OLlT.

That is, unless the human input signal level becomes below a certain value, the output can be made to be 11 A: 31 degrees, and as a slice circuit, t 1 lil J ('+).

Now, the conversion gain g of the output current benefiting the input terminal of the first differential amplifier 1 is ! 11n, "" to, """/26X10"
・---ill is expressed. Here, re is the equivalent emitter resistance of the differential transistor. in]
The voltage gain A of this amplifier is h=1. , R3/26X10-” ・・
(2) becomes. Now, if an input signal of △E (V) is applied to the base of l transistor Q1, then ]
The change in collector current of transistor Q, △IC+, is △
lC,==1.・△E/26X10-3 ・・・・
...-(3), and the change in collector voltage △v
cli:l:, ΔVC,=1.・△E, R3/26
X10-3... (4). Since this change is applied to the base of the transistor Q7, the change in the collector current of the transistor Q7, IC, is: △IC7= (I, -△) knee R3 - 12/26 x 1O
-3) 26X 1O-3-=1. ．． 12・△E-R31
It is expressed as 0,676X10=-+51.

Here, the collector current ICI of transistors Q1 and Q3
+Ie3 can both be considered to be equal and equal to 7, so by setting △ICI=∆Ic3-△■c7 Shizuku・kawa (6), the following equation holds true.

△E・'I/ 26X10-3 :': I+ φ12 "ΔB @R3/ 0.676
X 10-3"' (7) Therefore, the following equation is obtained from equation (7).

n3=,,-o, 026/12...
(8) If the values of R1 and 12 are selected so as to satisfy the equation (8), it can be operated as a slicer.

The change in collector current △■c7 when the second differential amplifier 2 is saturated can be considered as △Ic7-12, so if this is substituted into equation (5), △E=0.676X
IQ-3/I, , R3 (9). This ΔE is the slice level, and the slice level can be adjusted by the values of 11 and R3.

Also, by substituting equation (8) into (9), △E=0.02
6.12/11 ...(10) Tonashi,
(2) The slice level can also be adjusted by the values 1 and 12.

Figure 4 is a diagram showing the relationship between input voltage and output current.
As mentioned above, ±VT in the figure is the slice level and can be set freely. ) Note that the circuit configuration is not limited to the one shown in Figure 3, and the point is that two circuits with different saturation levels
Two amplifiers may be used to generate the same level and opposite phases, and the outputs of these amplifiers may be made common, and this common output may be used as a slice output.

Then, by adjusting the saturation level of the amplifier with the smaller saturation level, you can freely set the slice level.
Therefore, it is possible to slice even minute level signals, and there is no need for special voltage amplification.If both amplifiers are current amplifiers such as differential amplifiers, current slicing processing is possible, and other This can prevent adverse effects on the circuit.

[Brief explanation of drawings]

Figure 1 shows a conventional diode slice circuit, Figure 2 shows a conventional diode slice circuit.
3 is a diagram showing input and output waveforms of the circuit of FIG. 1, FIG. 3 is a circuit diagram of an embodiment of the present invention, and FIG. 4 is a diagram showing slice characteristics of the circuit of FIG. 3. 'Explanation of the names of the main parts... 1st amplifier 2...
. . . Second amplifier QI r Q2 . . . Differential transistor Q3 of the first differential amplifier. Q4...
...Cascode transistor Q71Q8...
...Differential L transistor of second differential amplifier Applicant
Pioneer Co., Ltd. Agent Patent Attorney Motohiko Rattan 63 Tame/Seki. Figure 3 Back side 2 Figure 4 Figure G

Claims (3)

[Claims] (1) Im1 is a first and second amplifier that generates a pair of outputs that are in-phase and anti-phase with respect to an input signal to be sliced and have the same level, and 1. A slice circuit characterized in that two amplifiers are configured to have different saturation levels, and each output of the first and second amplifiers is a common slice output. (2) The first and second amplifiers have a differential amplifier configuration, and the current source current of the differential amplifier constituting the first amplifier and the current source current of the differential amplifier constituting the second amplifier 2. The slice circuit according to claim 1, wherein: (3) The first amplifier is a first differential amplifier including a differential transistor and a cascode transistor connected in cascode via a resistor to each of the differential transistors, and 3. The slice circuit according to claim 2, wherein the knob is a 20th differential amplifier that uses the signal power generated in each of the resistors.