JPS5927575A - Manufacture of self-alignment thin film transistor - Google Patents

Abstract

PURPOSE:To improve high frequency characteristics of a transistor by forming by self-aligning method source and drain electrodes, treating and cleaning by hydrogen plasma the all boundary in which the source and drain electrodes are contacted with amorphous silicon. CONSTITUTION:After a gate electrode 16 is formed on a glass substrate 15, a gate insulating film 17 of SiO2 is formed by a plasma CVD method in a thin film forming apparatus, and an amorphous silicon film 18 is continuously formed in Si4 gas atmosphere without breaking vacuum state. A positive resist 19 is then coated on the film 18, with the electrode 16 as a mask it is exposed from the substrate side to develop it, thereby allowing only the resist 19 to remain on the gate electrode. Then, it is treated with hydrogen plasma at 23, thereby cleaning the surface of the film 18. After aluminum is deposited, a source electrode 20 and a drain electrode 21 are formed by lifting-off. The source and drain electrodes 20, 21 and the chanel region of the film 18 are cleaned, and an amorphous silicon film 22 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to an improvement in a method for manufacturing a thin film transistor using an amorphous semiconductor.

(2) Background of the technology - A field-effect thin film transistor is made by depositing a gate electrode, a gate insulating film, an amorphous silicon layer that is a semiconductor, and source and drain electrodes on a suitable substrate such as a glass plate, for example in a matrix. It is attracting attention as a driving element for large, segmented liquid crystal displays.

The eleventh number 1 shows an example of this, where 1- is a source electrode and 2 is a gate electrode. These constitute the vertical lines and horizontal lines M of the matrix. Reference numeral 3 denotes a drain electrode, which is rectangular and has a large area, and as shown in the cross-sectional view of figure b, forms a pair of poles of a liquid crystal panel together with a counter electrode 4, and a liquid crystal 5 is sealed between these electrodes. . The spacing between electrodes is 10μm
That's about it. Source Fu.

Poles and gates [! When the L electrode is selected and m, tr: is applied, the drain electrode 3, which forms a TPT (thin film transistor) along with the selected source, gate, and to electrodes, is selected.
A source is added to the source, and the drain is connected to the pole and the counter electrode 4.
The alignment of the liquid crystal between the
It looks white. To express a delicate image, a large number of micropixels are required, and the screen must be of a certain size, so it can be viewed from an IC using a chip several square meters, even if it is an A4 size. Therefore, thin film transistors are suitable for VCs for such applications.

(3) Prior Art and Problems Conventionally, there are two methods of manufacturing thin film transistors using amorphous silicon, as shown in FIGS. 2 and 3.

In the method shown in FIG. 2, first, a gate electrode material is deposited on a glass substrate 6 as shown in FIG.
was made, and StO! was applied thereon by plasma CVD method. This is used as the gate insulating film 8. An amorphous silicon layer is grown thereon by plasma CVD and patterned to form the semiconductor layer 9. Next, as shown in Figure 0, a positive type photoresist 1of is coated on the semiconductor layer 9, exposed and developed using a photomask 11, and then an electrode material is deposited as shown in Figure 0, and then lifted off to form a source electrode 12. Make the drain ° electrode 13 and finally d
As shown in the figure, a passivation film 14t is formed.

Next, in the method shown in FIG. 3, first, as shown in FIG.
A gate electrode material is vapor-deposited and patterned to form a gate electrode 7, and a gate electrode 7 is formed thereon using a plasma CVD method.
．． is grown, used as a gate insulating film 8, and a layer of b is formed on it.
As shown in the figure, a positive photoresist 10 is applied l1, exposed using a photomask 11, and developed. Next, as shown in FIG. 0, after depositing gold as a material for the electrode, lift-off is performed to form a source electrode 12 and a drain electrode 13. Next, as shown in Figure d, an amorphous silicon layer 9 and a passivation film 14 are formed by CVD.

In a thin film transistor manufactured by such a manufacturing method,
In the case of Fig. 2, there is a disadvantage that there is a large overlap between the fJi electrode 7 and the source and drain electrodes 12 and 13, resulting in poor high frequency characteristics, and furthermore, due to the series resistance in the thickness direction of the amorphous silicon layer 9. The disadvantage is that the 1C type sum current is kept low. In addition, in the case of FIG. 3, since the channel, source, and drain electrodes 12 and 13 are on the same plane, the series resistance is ignored and the saturation current increases, but after the gate insulating film 8 is formed,
Due to exposure to air, gas adsorption, contamination, etc. occur, resulting in a large number of interface states in the channel, resulting in poor characteristics.

(4) Object of the Invention In view of the above-mentioned conventional drawbacks, the object of the present invention is to provide a manufacturing method capable of obtaining a high-performance thin film transistor.

(5) Structure and object of the invention According to the present invention, in a method for manufacturing a thin film transistor using an amorphous silicon thin film as a semiconductor layer, after forming source and drain electrodes using a self-alignment method, hydrogen plasma is applied. This is achieved by providing a method for manufacturing a self-aligned thin film transistor, which is characterized by sequentially forming an amorphous silicon thin film through processing.

(6) Examples of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 4 is a diagram for explaining a method of manufacturing a self-aligned thin film transistor according to the present invention. In the figure, 15 is a glass substrate, 16 is a non-transparent gate electrode, 17 is 810. gate insulating film, 18&:l°r amorphous silicon film, 19ij positive photoresist, 20
Hance tn pole, 21 is do L/(n 14t, pole, 22
are amorphous silicon INK t so.

To explain the present invention in detail using FIG. 4, first, the gate electrode (N
kCr ) 16 days After the formation, nitrous oxide accumulation gas (N, 0) and silane gas (8111,
) The gate insulating film 17 of S Iu 2 was formed to a thickness of 3000× by the plasma CvL) method in an atmosphere of <An amorphous silicon film 18 is formed to a thickness of 120×vc by plasma CVD method.

Next 1) 911 in the figure <Coat the body resist 1-19 on the amorphous silicon film 18, and apply the gate 'iff, Ii
Using i6 as a mask, the glass substrate side is exposed to V light and developed, leaving the regimen)Is)' only on the gate Tff and pole as shown in Figure 0. Next, this resist 19' is removed as a mask and subjected to hydrogen plasma treatment 23 using the apparatus shown in FIG.
Then, the surface of the amorphous silicon film 18 is cleaned. Subsequently, as shown in Fig. d, 100 OX of aluminum is vapor-deposited, taken out of the apparatus 111, and lifted off to form a source electrode 20 and a drain electrode Mi21.

Thereafter, the substrate was placed in the apparatus shown in Fig. 5 again, hydrogen gas was introduced, the gas pressure was 0.5 Torr, and the substrate temperature was 120''C.
The source and drain were exposed to hydrogen plasma 24 as shown in Figure 0 under the conditions of 1 reaction time of 5 minutes and high frequency manual power of 40W.
The channels and channel regions of Lftfi, 20, 21 and the amorphous silicon film 18 are cleaned. Next, after evacuating the hydrogen in the apparatus, an amorphous silicon film 22 having a thickness of 5000 nm is formed again by plasma CVD in an SIH gas atmosphere as shown in figure f.

In this way, a thin film transistor without contamination on the source and drain electrodes or in the channel region can be obtained.

FIG. 5 is a diagram showing the apparatus used in the method of manufacturing a thin film transistor of the present invention, in which 25 is a vacuum chamber, 26 is a gas introduction tube, 27t is a vapor deposition shutter and flat discharge electrode, and 2''B
is a substrate, 29 is aluminum for vapor deposition, 30 id:'i
ll child gun, 31 & y high frequency person 11 power supply, 32 discharge ((put the tube away) 1. not shown. handle 331 on sink 27)
．． ? -J: Re-insulator: 34 through [7 water-'l'
9. (7) Invention 9, (7) Invention 9, 'It can be carried out in sequence to break the vacuum by hydrogen plasma treatment and aluminum evaporation to break the vacuum. As explained in detail in #11, the method for manufacturing the self-aligned thin film transistor of the present invention: By forming the source and drain electrodes using the self-alignment method, high frequency properties can be improved. However, by applying hydrogen plasma treatment to all interfaces where the source and drain electrodes contact amorphous silicon to clean them, thin film transistors with good V characteristics can be produced.

[Brief explanation of drawings]

Fig. 1 is a diagram for explaining the driving mechanism of a conventional liquid crystal display, Figs. 2 and 3 are diagrams for explaining a conventional method of manufacturing a film transistor, and Fig. 4 is a diagram for explaining the method of manufacturing a conventional film transistor. FIG. 5, which is a diagram for explaining a method of manufacturing a self-alignment type thin film transistor, is a diagram showing an apparatus capable of performing hydrogen plasma treatment and vapor deposition. In the drawing, 15 is a glass substrate, 16 is a gate electrode,
17 is a gate insulating film, 18 is an amorphous silicon film,
19 is a photoresist, 20 is a source electrode, 21 is a drain electrode, and 22 is an amorphous silicon/film. Shown below. Patent issuer Fujitsu Limited Patent application agent/patent attorney Akira Aoki Patent attorney Kazuyuki Nishidate Patent attorney 1) Yukio Patent attorney Akira Yamaguchi Figure 1 (G) (b) Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] 1. In a method for manufacturing a thin film transistor using an amorphous silicon thin film as a semiconductor layer, after forming source and drain electrodes using a self-alignment method, hydrogen plasma treatment is performed to continuously form a -C amorphous silicon thin film. A manufacturing method for self-aligned thin film transistors.