JPS59216392A - Signal processor - Google Patents

Abstract

PURPOSE:To reduce the processing capacity and facilitate to adding a new function by constituting a signal processing processor multi-functionally in a signal processing device of a time division exchange. CONSTITUTION:Plural microprograms for various signal processings are stored in each of signal processing processors 6a-6c. A microprogram for processing signals of a designated type is selected by a microprogram selecting instruction given from a control circuit 8 through a bus 3. The circuit 8 not only gives the program selecting instruction to processors 6a-6c but also reports time slot numbers on a highway corresponding to respective signal types to a highway control circuit 7 through the bus 3. The circuit 7 converts the signal to, for example, a timing signal in accordance with the time slot number and gives it to processors 6a-6c through control signal lines 4a-4c and 5a-5c.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the configuration of a signal processing device for a time division switch.

Conventionally, the signal processing equipment used to process the data on the PCM input/output to/from the time division switch has been dedicated to each type of signal handled, such as a multi-frequency signal transmitter, a multi-frequency signal receiver, and a PB (PB). Each terminal is equipped with a signal receiver (button), a conference call signal processing device, etc. The number of devices for each type requires the maximum number of equipment required at the peak of signal processing of that type. Therefore, the total number of facilities required for division losses increases. Further, since the size of the device and the interface with the line differ depending on the signal type, it is not possible to mount another type of signal processing device in the space reserved for mounting one type of signal processing device. Furthermore, adding new functionality or replacing with new equipment is extremely slow and inflexible.

In order to compensate for this drawback, a concept has been proposed in which signals are processed by a program using a signal processing microprocessor with the same device size and line interface configuration (1981 National Institute of Electronics and Communication Engineers General Conference S-1, 5-61 Advances in digital signal processing equipment and its application to electronic exchanges According to this method, it is relatively easy to add new functions, and even with different types of signal processing equipment, the line Since the size of the interface and mounting part are the same, there is no need to divide the mounting space for each type. However, the type of signal and number of lines handled by one processing device are fixed, and As mentioned above, the number of devices with the maximum processing capacity required for simultaneous operation is required.

An object of the present invention is to solve the above-mentioned conventional drawbacks, and to provide a signal processing processor capable of changing the type of signal handled by a control signal in a capacity sufficient to handle the total number of simultaneous operations. An object of the present invention is to provide a signal processing device in which the total number of signal processing processors is reduced.

The signal processing device of the present invention selects 12 microprograms from among a plurality of microprograms in response to a microprogram selection command given from a control circuit that is connected to an input/output highway and/or an output highway, and is provided by a control circuit described later.

one or more signal processing processors that process output signals, and control for sending a microprogram selection command to the signal processing processor and at the same time giving the highway control circuit described below a time slot number of the highway to be outputted to the signal processing processor; and a control circuit that converts the time slot number output from the control circuit into an output timing signal and supplies it to the signal processing processor, and controls each signal processing processor according to instructions from the control circuit. The feature Σ is that the signal processing function can be changed.

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

That is, signal processing processors 6a and 6b.

All 6Cs have the same configuration, and the input cable 1
And the interface with the output highway 2 is also the same. Each signal processing processor 6a, 6by6c has a plurality of microprograms stored in its built-in memory (or shared memory) for performing various signal processing.
In response to a microprogram selection command given from the control circuit 8 via the node 3, a microprogram to process a specified type of signal is selected.Now, the signal processing processors 6a, 6b, and 6c each select a program. The control circuit 8 provides the above-mentioned program selection command to each signal processing processor 6a, 6b, and 6e, and has a PB signal processing function, an MF signal processing function, and a conference call signal processing function. The time slot (channel) number on the Itaei (corresponding to the signal type) is notified to the highway control circuit 7 via the node 3. No.1 way control circuit 7 converts the time slot number into, for example, a timing signal and sends it to control signal lines 4a, 4b, 4c and 5a, 5b, 5c.
The signal is supplied to the signal processing processors 6a, 6b, and 6c via the signal processing circuit.

FIG. 2 shows control signals N4a, 4b, 4c, and 5a.

5 is a time chart showing an example of timing signals on 5b and 5c. Input highway 1 time slot $01
'#1 PB reception signal PBR, PBI? is input to the signal processing processor 6a, the MF reception signal IVIFR of time slot #2 is input to the signal processing processor 6b,
Time slot valve 3-6 conference call signal CFC-A, CF
CB, CFC-C, and CFC-D are input to the signal processing processor 6C. Still, the MF transmission signal MFS output from the signal processing processor 6b is sent to time slot #10 of the output way 2, and the MF transmission signal MFS output from the signal processing processor 6b is
Conference telephone call signals CFC-A' and CF output by c
C-B', CFC-C, CFC- or output highway 2
is transmitted in time slots #3 to #6.

The signal processing processor 6a receives the P B receiving (Pt signals PBR, PBR' from time slots #0 and #1 of the human car 1 way 1, performs processing such as decoding the receiving (i signal), and performs processing such as decoding of the receiving (i signal), [destination information, etc.] (via step 3 to the control circuit 8 and a central processing unit (not shown), etc.
Processing such as reading is performed. The transmission signal of the multi-frequency signal sent out in time slot #10 of output cable 2 is as follows:
The signal is sent out from the signal processor 6b.

The signal processing processor 6C manually inputs the outgoing call signal of the conference call in the time slots #3 to #6 of the incoming call 1 way 1,
Processing such as selection processing is performed and the data is sent to time slots #3 to #6 of output cable way 2.

Output highways 1 and 2 are, for example, paired four-line transmission lines, and time slots #3 to #6 are transmitting and receiving channels for subscribers A, B, C, and D, respectively. Now, for example, when subscriber A speaks, the signal CFC-A in time slot #3 of input channel 1 has the highest speech level. The signal processing processor 6C selects a speaker by comparing the levels of evening slots #3 to #6, and selects a speaker from time slot #4 of the output highway 2.
1-#:51 Signal CFC-B', C sent to #6
FC-σ and CFC-4 are all referred to as CFC-A. There is no need to send a signal to time slot j#3. That is, subscriber A's message is input to the signal processing processor V6c in time slot #3 of input highway 1, and sent to time slot #L #5s #6 of output highway 2, and is transmitted to subscriber B, 'Transmitted to C and D. Next, when subscriber B speaks, it is similarly processed by the signal processing processor 6C, and the output signal is sent to time slot $3 of way 2. #st Sent to $6 and sent to subscribers A and C
, D.

The communication-8 processing processors 6a, 6b, and 6c do not have the above-mentioned fixed function. Therefore, for example, when a conference call is not being conducted, the signal processing processor 6c can be provided with the function of transmitting and receiving multi-frequency signals. Therefore, the total capacity of each signal processing processor 'y is PB signal processing, M
It is sufficient to have the necessary processing capacity to simultaneously perform F signal processing and conference call signal processing. That is, it is possible to eliminate the division J:rA that occurs due to processing by dedicated devices for each type of signal as in the past, and to reduce the total capacity of the signal processing processor.

Additionally, new functions can be easily added by changing the program. In addition, input/output highway 1
, 2 do not constitute a pair of four-line lines as described above, but even if they are completely different lines, the same effect can be obtained with a similar configuration. Furthermore, by changing the input/output time slots of the signal processing processor in the highway control circuit 7, it also has the functionality of a time division switch.

As described above, in the present invention, the signal processing processor is configured to have multiple functions, and the type of signal processing to be performed is determined by
Microprogram selection command given from the control device (
)) Inputs the signal of the corresponding time slot according to the control signal considered from the Eway control circuit and sends it out to the designated time slot.

Therefore, when each signal processing processor is not performing one type of signal processing, it is possible to process other types of signal processing, and the overall processing capacity can be reduced to the extent that each type of signal processing can be performed simultaneously. This has the effect of reducing the capacity to the required level. That is, there is an effect of eliminating the 7E division loss that conventionally occurs due to the use of a signal processing device for q for each page of signal type. However, since each non-Φ signal processing is performed by the same 47"J signal processing processor, the interface with the line is the same, and expansion and new functions can be easily added.

[Brief explanation of the drawing]

1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a time chart showing an example of each part signal in the above embodiment. In the figure, 1... input highway, 2... output highway, 3... bus, 4a, 4b, 4c, 5a. 5b, 5cm control signal Mfl, 6a, 6))5 6
Q"'Signal processing processor, 7...highway control circuit, 8...ttill?ii1 circuit. Agent: Patent attorney Toshimune Sumita

Claims (1)

[Claims] A signal processing processor connected to an input highway and/or an output highway selects one of a plurality of microprograms in response to a microprogram selection command given from a control circuit described later, and processes output signals using the selected program. one or more and
A control circuit that sends a microprogram selection command to the signal processing processor and at the same time gives a time slot number of a way to cause the signal processing processor to output data to a way control circuit described later; and a time slot for the output of the control circuit. A highway control circuit converts the number into an output timing signal and supplies it to the signal processing processor, and the signal processing function of each signal processing processor can be changed according to instructions from the control circuit. signal processing device.