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JPS5919371A - Brightness detecting system by storage type photosensor - Google Patents

Brightness detecting system by storage type photosensor

Info

Publication number
JPS5919371A
JPS5919371A JP57128549A JP12854982A JPS5919371A JP S5919371 A JPS5919371 A JP S5919371A JP 57128549 A JP57128549 A JP 57128549A JP 12854982 A JP12854982 A JP 12854982A JP S5919371 A JPS5919371 A JP S5919371A
Authority
JP
Japan
Prior art keywords
photosensor
time
output
brightness
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57128549A
Other languages
Japanese (ja)
Inventor
Tokuichi Tsunekawa
恒川 十九一
Shinji Sakai
堺 信二
Takao Kinoshita
貴雄 木下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP57128549A priority Critical patent/JPS5919371A/en
Priority to US06/516,115 priority patent/US4587415A/en
Publication of JPS5919371A publication Critical patent/JPS5919371A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50Control of the SSIS exposure
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/703SSIS architectures incorporating pixels for producing signals other than image signals
    • H04N25/707Pixels for event detection

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Photometry And Measurement Of Optical Pulse Characteristics (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Facsimile Heads (AREA)

Abstract

PURPOSE:To readily detect the time mean brightness by reading out the output of a storage type photosensor applied to the structure of a static induction transistor in the storage of optical information by using the photosensor and calculating the time differentiation. CONSTITUTION:Storage type photosensors PT1-PT7 which can nondestructively read out and applies the structure of a static induction transistor formed sequentially with an N<-> type layer, a P type layer and an N<+> type layer are arranged linearly on an N<+> type silicon substrate. When a drive circuit DV is in low level state, optical information stored in the photosensors PT1-PT7 are cleared, and when a switch SW1 is closed, the storage is started. When sample pulses for differentiation is produced at times tA, tB, output signals are held through sample-holding circuits SA2, SB2, SA4, SB4, thereby obtaining information of mean brightness between the times tA and tB.

Description

【発明の詳細な説明】 本発明は、S IT(静電誘導型トランジスタ)の構造
を応用したフォトセンサ等の蓄積された光入力による出
力がリアルタイムに、非破壊に、積分された信号として
出力される蓄積型7オトセンサに於いて、光情報の蓄積
開始と共に1個またはn個の該フォトセンサの出方を読
み出し、該読み出l〜信号の時間微分を算出することに
ょジ、該フォトセンサ面上の明るさを検知し、蓄積時間
の決定をもする方式に関するものである。
[Detailed Description of the Invention] The present invention utilizes the structure of a SIT (static induction transistor) to output accumulated light input from a photosensor, etc., and output it in real time, non-destructively, as an integrated signal. In the storage-type 7-photo sensor, when the accumulation of optical information starts, the output of one or n photosensors is read out, and the time differential of the read l~ signal is calculated. This relates to a method that detects the brightness on a surface and also determines the storage time.

従来、センサ面上の明るさを検知する方式とL7ては、
非蓄積型のフォトダイオード等が用いられているが、こ
れらのセンサから生ずる出力は時々刻々変化するので、
時間平均的な明るさを検知するだめには、一定時間の積
分が必要であり、回路が複雑になる。
Conventionally, the method of detecting the brightness on the sensor surface and L7 are as follows.
Non-storage type photodiodes are used, but the output from these sensors changes from moment to moment, so
In order to detect time-averaged brightness, integration over a certain period of time is required, making the circuit complex.

本発明は、何ら複雑な回路構成な[7に、蓄積型フォト
センサ出力に基づいて明るさを検知する方式を提供する
ものである。
The present invention provides a method for detecting brightness based on the output of an accumulation type photosensor, which does not require any complicated circuit configuration.

以下図面を用いて本発明を具体的に説明する。The present invention will be specifically explained below using the drawings.

第1図(a)はSITフォトセンサの構造の概略図であ
りs n土層のシリコン基板の上にn一層。
FIG. 1(a) is a schematic diagram of the structure of the SIT photosensor, which consists of an n layer on a silicon substrate with an n soil layer.

p層、n土層を図示の如く形成して構成する。A p layer and an n soil layer are formed as shown in the figure.

感光面であるn土層に入射した光は正孔と電子対を作り
、正孔がp層に蓄積される。p層に蓄積される正孔は入
射光の強さに比例するものであシ、フォトトランジスタ
のベースの電位全形成する。このペース電位に基づいて
、負荷抵抗RLを介して、光電変換出力信号が得られる
Light incident on the n-layer, which is the photosensitive surface, creates pairs of holes and electrons, and the holes are accumulated in the p-layer. The holes accumulated in the p-layer are proportional to the intensity of incident light and form the total potential of the base of the phototransistor. Based on this pace potential, a photoelectric conversion output signal is obtained via the load resistor RL.

DVはSITフォトセンサの駆動回路であり、Dvの出
力が高レベルの時には光情報の蓄積及び読み出しが行わ
れており、DVの出力が低レベルの時には、p層に音種
されていた正孔がリフVツ7ユ(クリア)される。即ち
、DVが高レベルの時には、画像情報を非破壊に倒産で
も読み出しが出来る。
DV is a drive circuit for the SIT photosensor, and when the output of DV is at a high level, optical information is stored and read out, and when the output of DV is at a low level, the holes that were generated in the p layer are is riff Vtsu7yu (cleared). That is, when the DV is at a high level, image information can be read out non-destructively even if the device is destroyed.

第1図(b)は第1図(暑)のSITフォトセンサの駆
動の等価回路を示したものでありFTがSIT構造の7
オトセンサである。
Figure 1(b) shows an equivalent circuit for driving the SIT photosensor in Figure 1 (hot), and the FT has a SIT structure.
It is an auto sensor.

第2図は、本発明の非破壊読み出しの出来る蓄積型フォ
トセンサをライン状に配設し、該センサ而」二の明るさ
を検知し、該検知された明るさに基づいて蓄積時間を決
定する電気回路の一実施例である。PTI−FT7はS
IT構造のフォトセンサ、AGI−AG7は信号読み出
し用のスイッチングゲートであり、デコーダドライバD
ODにより制御される。ONTはDOD制御用のカウン
タ、OKTはパルス制御回路である。BO2,BO2は
フォトセンサの出力の検知用のゲート、RL、R,L2
.RL4は信号読み出し用負荷抵抗、INはインバータ
%SA2゜8A4.SB2,8B4はサンプルホールド
回路、R80〜R88は演算抵抗、OPt〜OP3は演
算増幅器、MTI、MT2は、検知した明るさの情報を
表示するための表示器、0.。は蓄積時間決定用の積分
コンデンサ、AGは0.。の積分電荷をリセットするリ
セットゲート、OMPはコンパレータ、RFは参照電圧
、ANはアンドゲート、POKは信号処理回路、SWI
は。
Figure 2 shows storage type photosensors of the present invention capable of non-destructive readout arranged in a line, detecting the brightness of the sensor and determining the storage time based on the detected brightness. This is an example of an electric circuit. PTI-FT7 is S
The IT-structured photo sensor, AGI-AG7, is a switching gate for signal readout, and a decoder driver D.
Controlled by OD. ONT is a counter for DOD control, and OKT is a pulse control circuit. BO2, BO2 are gates for detecting the output of the photosensor, RL, R, L2
.. RL4 is the load resistance for signal readout, IN is the inverter %SA2°8A4. SB2 and 8B4 are sample and hold circuits, R80 to R88 are operational resistors, OPt to OP3 are operational amplifiers, MTI and MT2 are indicators for displaying information on detected brightness, and 0. . is an integrating capacitor for determining the accumulation time, and AG is 0. . OMP is a comparator, RF is a reference voltage, AN is an AND gate, POK is a signal processing circuit, SWI is a reset gate that resets the integrated charge of
teeth.

回路の始動を制御するスイッチである。第3図は第2図
の主要部のタイミングチャートでおり、これに基づいて
第2図の作動を詳述する。時刻t1゜ではφlが低レベ
ルでめり8IT駆動回路DVも低レベルに反転している
ので8IT構造のフォトセンサPTI〜PT7に予め蓄
積されている不必要の光(画像)情報がクリアされると
同時にカウンタCNTもリセットされている。時刻tl
lでスイッチsw1がオンすると、φ1が高レベルに反
転し、DVも高レベルに反転するのでフォトセンサFT
に光情報の蓄積が開始されるがコンパレータCPMの出
力が低レベルのためアントゲ−)ANは基準クロックパ
ルスφ2をカウント出来ない。この状態に於いては、カ
ウンタCNTの出力端子C6−C1は全て低レベルであ
p、デコーダドライバDCDはAO端子のみが高レベル
になりアナロググートム01〜人G7は全てオフになっ
ている。一方インバータINの出力は高レベルのため、
ゲー)BO2,BO2がオンし、予められたフォトセン
サPT2.PT4゜の出力が常時負荷抵抗RL2.RL
4を介して読み出される。時刻IA、 、 4n・で信
号の時間微分用のサンプルパルスが生ずると、サンプル
ホールド回路SA2.SB2.Sム4.SB4を介して
各時刻に於ける出力信号がホールドされ、抵抗R80〜
R87演算増幅器OPI 、OF2からなる差動増幅回
路により時刻tBにホールドされた信号から時刻味にホ
ールドされた信号が差し引かれ、OPI、OF2の出力
に時刻tA〜tBの間の平均的な明るさの情報が得られ
、表示器MTI、MT2で表示される。
This is a switch that controls the start of the circuit. FIG. 3 is a timing chart of the main part of FIG. 2, and the operation of FIG. 2 will be explained in detail based on this. At time t1°, φl is at a low level and the 8IT drive circuit DV is also inverted to a low level, so unnecessary light (image) information stored in advance in the photosensors PTI to PT7 of the 8IT structure is cleared. At the same time, the counter CNT is also reset. Time tl
When the switch sw1 is turned on at l, φ1 is inverted to high level and DV is also inverted to high level, so the photo sensor FT
Accumulation of optical information is started at , but since the output of the comparator CPM is at a low level, the analog/game) AN cannot count the reference clock pulse φ2. In this state, all of the output terminals C6-C1 of the counter CNT are at a low level, and only the AO terminal of the decoder driver DCD is at a high level, so that the analog goots 01 to G7 are all turned off. On the other hand, since the output of inverter IN is at a high level,
Game) BO2, BO2 is turned on, and the photo sensor PT2. The output of PT4° is always connected to the load resistance RL2. R.L.
4. When a sample pulse for time differentiation of the signal is generated at times IA, , 4n., the sample and hold circuits SA2. SB2. SM4. The output signal at each time is held via SB4, and resistors R80 to
A differential amplifier circuit consisting of R87 operational amplifiers OPI and OF2 subtracts the signal held at time from the signal held at time tB, and the average brightness between time tA and tB is output from OPI and OF2. information is obtained and displayed on the displays MTI and MT2.

次に7オトセンサの蓄積時間の制御を行うために時刻t
Bに生ずるサンプルホールドパルスの立下りに同期して
グ4が反転しリセットゲートAGをオフすると、OPI
 、OF2の出力の演算値に基づいて蓄積時間決定用の
秒時積分が開始される。時刻t8.でOF2の出力が参
照電圧RFを超えるとコンパレータCMPの出力は高ト
ゲ−)ANを介して基準クロックパルスyi2がカウン
タCNTに入りデコーダドライバDCDによりアナログ
ゲートAG1〜AG7が順次オンし、フォトセンサPT
I〜PT7の出力が時系列的に負荷RLを介して読み出
されPCKで信号処理される。蓄積時間決定用のコンパ
レータCMPの反転に基づいてDVの出力レベルを適当
な一定の電圧レベルに設定すると画像情報の絖み出し中
、更なる光情報の蓄積を停止することも出来る。またO
PI、OF2の出力を演算する演算抵抗188 、R8
9の値を適当に変えて設定することにより明るさ検知用
のフォトセンサの出力に重みっけを行って蓄積時間の決
定を行うことが出来る〇 第4図は、本発明の別の実施例の一つでおp1明るさ検
知用のフォトセンサをフォトセンサ選択手段MSTのセ
ットレバ−BSをセットして任意にセット出来る方式を
提示するものである。
Next, time t is used to control the accumulation time of the 7th sensor.
When G4 is inverted in synchronization with the fall of the sample and hold pulse generated at B, and the reset gate AG is turned off, OPI
, OF2 starts second-time integration for determining the accumulation time. Time t8. When the output of OF2 exceeds the reference voltage RF, the output of the comparator CMP becomes high.) The reference clock pulse yi2 enters the counter CNT via AN, and the analog gates AG1 to AG7 are turned on in sequence by the decoder driver DCD, and the photo sensor PT
The outputs of I to PT7 are read out in time series via load RL and signal processed by PCK. If the output level of the DV is set to an appropriate constant voltage level based on the inversion of the comparator CMP for determining the accumulation time, it is also possible to stop further accumulation of optical information during the start-up of image information. Also O
Operational resistor 188, R8 that calculates the output of PI and OF2
By appropriately changing and setting the value of 9, the output of the photosensor for brightness detection can be weighted to determine the accumulation time. Figure 4 shows another embodiment of the present invention. In one of the methods, a method is proposed in which the photosensor for detecting p1 brightness can be arbitrarily set by setting the set lever BS of the photosensor selection means MST.

オアゲートORO〜OR2、アントゲ−) ANQ〜^
N2はフォトセンサ選択手段MSTにセットされている
明るさ検知用のフォトセンサを選択するためのゲートで
あり、D1〜D7は選択されたフォトセンサを表示する
ための発光表示素子、R1−R7は電流制限抵抗である
ORGATE ORO~OR2, Antogame) ANQ~^
N2 is a gate for selecting a photosensor for brightness detection set in the photosensor selection means MST, D1 to D7 are light emitting display elements for displaying the selected photosensor, and R1 to R7 are gates for selecting a photosensor for brightness detection set in the photosensor selection means MST. It is a current limiting resistor.

例えば、明るさ検知用のフォトセンサのセットレバ−B
Sを図示の如く■にセットするとデコーダドライバDC
DOム4の端子が高レベルにな9発光素子D4が発光す
ると同時にアナログゲー)AG4がオンしフォトセンサ
PT4の出力が常時出力されることになる。
For example, set lever B of a photosensor for brightness detection.
When S is set to ■ as shown in the figure, the decoder driver DC
At the same time that the terminal of the DOM4 becomes high level and the light emitting element D4 emits light, the analog game AG4 is turned on and the output of the photosensor PT4 is constantly outputted.

本電気回路の具体的作動は、第2図と同等であるので省
略する。
The specific operation of this electric circuit is the same as that in FIG. 2, so it will be omitted.

なお、上記実施例に適用したSIT以外にSITセンサ
ーとしては征々変形例を適用する目、FIRSiaD1
975年RD−22P185、テレビジョン学会、昭和
56年8月28日技術報告1iD590、R50に記載
される例等、これに限定されない。
In addition to the SIT used in the above embodiment, the SIT sensor is FIRSiaD1, which has various modifications.
Examples include, but are not limited to, those described in RD-22P185, 975, Technical Report 1iD590, R50, August 28, 1980, Technical Report of the Television Society of Japan.

以上の如く本発明を使用すると非破壊読み出しの出来る
蓄積型フォトセンサの光情報蓄積中の出力を読み出し、
該読み出し信号の時間微分を算出して、明るさを検知す
るのみならず、蓄積時間をも決定出来る著しい特徴かめ
る。
As described above, by using the present invention, it is possible to read out the output of a storage type photosensor during optical information storage, which can be read out non-destructively.
By calculating the time derivative of the readout signal, we can see the remarkable feature that not only detects the brightness but also determines the accumulation time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(、)は本発明に適用するSITセンサー素子断
面図、第1図(blは第1図(−1図示孝子の等価回路
図 第2図は本発明に係る検出回路−実施例図法3図は第2
図示回路の動作波形図 第4図は第2図示回路の他の変形例電気回路図PTI〜
FT7 ; SITセンサー AGI〜AG7 ;絖み出しゲート SA2.SA4.SB2.SB4 ;サンプルホールド
回路OFI〜OP3 ;演算増幅回路 Cl01積分コンデンサー 特許出願人  キャノン株式会社 手  続  補  正  書(自発) 昭和57年12月21」 1■和57年 特許願 第 128549号2、発明の
名称 蓄積型フォトセンサによる明るさ検知方式3、補正をす
る者 事件との関係     特許出願人 住所 東京都大田区下丸子3−30−2名称 (+01
1)キャノン株式会社 代表者 賀  来  龍 三 部 4、代理人 居所 〒148東京都大田区下丸子3−30−25、補
正の対象 図面の第2図及び第4図 6、補正の内容 第2図、第4図を別紙のとおり補正する。
Fig. 1 (,) is a sectional view of the SIT sensor element applied to the present invention, Fig. 1 (bl is Fig. 1 (-1) is an equivalent circuit diagram of Takako, Fig. 2 is a detection circuit according to the present invention - example diagram) Figure 3 is the second
Operation waveform diagram of the illustrated circuit FIG. 4 is an electric circuit diagram of another modification of the second illustrated circuit PTI~
FT7; SIT sensor AGI to AG7; heave opening gate SA2. SA4. SB2. SB4; Sample and hold circuit OFI to OP3; Operational amplifier circuit Cl01 Integrating capacitor Patent applicant: Canon Co., Ltd. Procedural amendment (spontaneous) December 21, 1980" 1 ■ 1980 Patent Application No. 128549 2, Invention Brightness detection method 3 using a name storage type photosensor, relationship with the case of the person making the correction Patent applicant address 3-30-2 Shimomaruko, Ota-ku, Tokyo Name (+01
1) Canon Co., Ltd. Representative: Ryu Kaku, Department 4, Agent address: 3-30-25 Shimomaruko, Ota-ku, Tokyo 148, Figures 2 and 4 of the drawings to be amended, Figure 4, 6, Contents of the amendment, Figure 2 , Figure 4 is corrected as shown in the attached sheet.

Claims (1)

【特許請求の範囲】 (11蓄積された光入力による出力が、リアルタイムに
、非破壊に積分された信号として出力される蓄積型フォ
トセンサに於いて、光情報の蓄積中に1個まfcI′i
n個の該フォトセンサの出力を読み出し、該読み出し信
号の時間微分を算出することにより該フォトセンサ面上
の明るさを検知することを特徴とする蓄積型フォトセン
サの明るさ検知方式。 (2)  該時間微分によシ算出された明るさに基づい
て、蓄積時間を決定することを特徴とする特許請求の範
囲第(1)項記載の蓄積型フォトセンサの明るさ検知方
式。
[Claims] (11) In an accumulation type photosensor in which the output from accumulated optical input is output in real time as a non-destructively integrated signal, only one fcI' is output during accumulation of optical information. i
A brightness detection method for an accumulation type photosensor, characterized in that the brightness on the surface of the photosensor is detected by reading out the outputs of the n photosensors and calculating the time differential of the readout signal. (2) A brightness detection method for an accumulation type photosensor according to claim (1), wherein the accumulation time is determined based on the brightness calculated by the time differentiation.
JP57128549A 1982-07-23 1982-07-23 Brightness detecting system by storage type photosensor Pending JPS5919371A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP57128549A JPS5919371A (en) 1982-07-23 1982-07-23 Brightness detecting system by storage type photosensor
US06/516,115 US4587415A (en) 1982-07-23 1983-07-20 Photo-detecting device with storage time control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57128549A JPS5919371A (en) 1982-07-23 1982-07-23 Brightness detecting system by storage type photosensor

Publications (1)

Publication Number Publication Date
JPS5919371A true JPS5919371A (en) 1984-01-31

Family

ID=14987500

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57128549A Pending JPS5919371A (en) 1982-07-23 1982-07-23 Brightness detecting system by storage type photosensor

Country Status (1)

Country Link
JP (1) JPS5919371A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0391090U (en) * 1989-12-28 1991-09-17

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0391090U (en) * 1989-12-28 1991-09-17

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