JPS59135752A - Semiconductor device - Google Patents

Abstract

PURPOSE:To contrive simplification of assembling and wiring works as well as to improve the reliability and characteristics of the titled device by a method wherein collector and emitter electrodes which are common to each substrate are provided on a divided insulating substrate together with each base electrode. CONSTITUTION:Two base electrodes 12, an emitter electrode 10 common to both of said electrode 12, and a collector electrode 11 are adhered to each insulating substrate 9. Besides, the base electrode 12 and the emitter electrode 10 are arranged in such a manner that the collector electrode 11, whereon a transistor chip 13 will be adhered, is pinched between them. As a result, the reliability of the device, the workability of assembling and the characteristics of the device can be improved by slightly increasing the number of parts used when compared with the conventional device.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The invention relates to a semiconductor device, and particularly to a semiconductor device comprising a resin-sealed semiconductor module in which a plurality of semiconductor elements are disposed on an insulating substrate.

[Prior art]

BACKGROUND ART In recent years, electronic devices have made remarkable progress, and devices are rapidly becoming more highly integrated, smaller, and more intelligent, and the basic element of this is the miniaturization of semiconductor devices. In the past, thyristors were mainly used as medium-capacity power semiconductor devices, but with the increase in transistor capacity, improvements in characteristics such as simplification of peripheral circuits and shortening of switching time11 As a result, this transistor has come to be replaced by a thyristor, and this transistor is also actively used in the field of so-called power modules, in which a plurality of power devices are combined into a single package.

In these power modules and calls, the electrodes were insulated within the semiconductor device to facilitate integration into equipment. There are many so-called insulated type modules, and in order to increase the capacity of these insulated type power modules, there is the problem of current phase splitting caused by connecting multiple chips separately, as well as the problem of current phase separation due to the insulating substrate on the bottom surface of the electrode. There are various problems associated with increasing the size.

The conventional implantation configuration of this type of semiconductor device is shown in FIGS. 1 and 2. In each of these figures, the heat sink (1
), on which are respectively an emitter electrode (3), a collector electrode (4), and a 0:H-
A sumi pole (5) is glued, and a collector electrode f pole (14
In this case, four transistor chips (6) are installed on the top, and the emitter pad and base pad on the top surface of each transistor chip (6) and the corresponding emitter are connected to the pole (3) and the base electrode (5). ) and the aluminum
A wire bond connection is made through M(7) to form a parallel connection between each transistor nap (6). (In this configuration, the emitter electrode (3) and the collector electrode (
4) External box rods are rising from each of them, but in Figure 1, the state before they rise is a water bomb. The half-barrel module assembly having the above configuration is housed in a separate outer container (not shown), and the upper end of each external 'i' pole is left, and this is sealed with resin. Then the field will be completed.

Therefore, in the case of this conventional device, as the size of each transistor chip (6) increases and the number of transistor chips (6) increases, the collector electrode (4) increases in proportion to this.
) is made large, and the insulating substrate (C) on the bottom side is also unavoidably enlarged, which causes warping of the insulating substrate (2) itself. For example, the insulating substrate (2) is 40X
When the size is about 40 mm, a warpage of 0.3 to 0.4 mm will occur, making it difficult to adhere to the lower heat sink (1), making it difficult to adhere to the broken heat sink (1). The resulting thermal strain may even increase, causing cracks in the insulating substrate (2). And at the same time, each transistor chip (6) is connected to the emitter N
When connecting the pole (3) and the base N-pole (5) with the aluminum wire (7), the wires tend to come into contact with each other, making wiring work difficult, and the length of each aluminum wire (7) is different for each chip. (For example, in FIG. 1, the chip on the left side has nearly twice the emitter wiring length as compared to the chip on the right side.) This causes a problem that the current balance of each transistor chip (6) becomes poor.

In such a semiconductor device, the P-edge substrate becomes large in order to increase the capacity (l' property is lost and wiring work between the chip and the IF becomes difficult).

In addition, there was a problem of % cropping, and in order to solve this problem, the insulating board was divided into parts.

Nearly twice the number of poles was required, and the connection between the two wires was also complicated, which unnecessarily increased the number of parts and made the silk-making process more complicated.

[Summary of the invention]

In view of these conventional drawbacks, the present invention has a structure in which a common collector and emitter electrodes are arranged on each divided insulating substrate in addition to each base electrode, thereby simplifying assembly and wiring work. This is intended to simplify the structure and improve two reliability characteristics.

[Embodiments of the invention]

Hereinafter, one embodiment of the semiconductor device according to the present invention will be described.
The details will be explained with reference to FIGS. 3 and 4.

The embodiments shown in FIGS. 3 and 4 correspond to the conventional examples shown in FIGS. 1 and 2, respectively. In these figures 3 and 4, the heat sink (8) has a pair of insulating substrates (9).
are fixed on each insulating substrate (9), and one base 5 pole (2) and an emitter city and pole (1) common to both.
0) and the collector electrode 0υ are bonded. In this figure, each electrode (10) is similar to the figure 1 above.
, the state before the rise of (II) is maintained.

On both collector electrodes ov, two transistor chips α east are glued, and the base electrode and emitter electrode 00) are connected to an insulating substrate (9).
This transistor chip Q31 is on the top.

Furthermore, the transistor chip (the emitter pad and base pad on the upper surface of 13 and the corresponding emitter electrode GO) and the base electrode (2) are connected to the aluminum wiring (1) so as to sandwich the collector electrode αυ.
4) Connect each transistor (to each other) separately by wire bonding, and complete the process by sealing with resin (not shown) in the same manner.

Therefore, in the case of the configuration of this embodiment, since the common emitter and collector voltage @I are arranged on two divided insulating substrates, even if the chip surface I increases to increase the capacity, the insulation It is unnecessary to make the surface 8i of the board particularly large,
This absolutely prevents the difficulty of adhering the board to the heat sink due to warpage, as well as cracking due to thermal distortion, and also simplifies wiring work because each transistor chip corresponds to the electrode to be wired. Not only that, there is no risk of complicated intertwining, and each wiring length can be made the same, resulting in good current balance and improved characteristics.

Although the above embodiment deals with the case where the insulating substrate is divided into two pieces, it is of course applicable to the case where the insulating substrate is divided into a larger number of pieces.

〔Effect of the invention〕

As described in detail above, according to the present invention, a base electrode and co-tracing emitter and collector electrodes are provided on each substrate on a plurality of divided insulating substrates, and a transistor chip 'f! :Since the base electrode and emitter positive electrode are arranged to sandwich the collector electrode to be bonded, the reliability of the device, ease of installation, and It is useful for improving characteristics.

[Brief explanation of drawings]

FIGS. 1 and 2 are a plan view and a side view of a conventional semiconductor device, and FIGS. 3 and 4 are a plan view and a one-dimensional plan view of a semiconductor device according to an embodiment of the present invention. (8)... Heat sink, (9)... Insulating base! , (1
0)... Emitter sum product, 0 East)... Collector electrode, (2) Φ... Be-xli, (c) @φ transistor chip, α4) φ...-aluminum wiring. Agent Haku Kuzuno - Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] Multiple insulating substrates are fixed on the heat sink, and on each insulating substrate, an individual base electrode, an emitter box rod common to each substrate, and a collector electrode are installed to correspond to the collector electrode provided on the transistor chip. base electrode,
A semiconductor device characterized by dots arranged so as to have an emitter electrode.