JPS59114787U - Synchronous signal generation circuit - Google Patents
Synchronous signal generation circuitInfo
- Publication number
- JPS59114787U JPS59114787U JP690083U JP690083U JPS59114787U JP S59114787 U JPS59114787 U JP S59114787U JP 690083 U JP690083 U JP 690083U JP 690083 U JP690083 U JP 690083U JP S59114787 U JPS59114787 U JP S59114787U
- Authority
- JP
- Japan
- Prior art keywords
- nant
- gate
- signal generation
- input terminal
- comparator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Power Conversion In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案を説明するための一例の回路図、第２図
は本考案の一実施例の回路図、第３図は第２図回路の動
作を説明する為の波形図である。
Ｏ２０・・・マルチバイブレータ、ＣＯＰ・・・コンパ
レータ、ＤＩｖ・・・微分回路、■ＮＶ・・・インバー
タ。FIG. 1 is an example circuit diagram for explaining the present invention, FIG. 2 is a circuit diagram for an embodiment of the present invention, and FIG. 3 is a waveform diagram for explaining the operation of the circuit shown in FIG. O20...Multivibrator, COP...Comparator, DIv...Differential circuit, ■NV...Inverter.
Claims (1)
属的に接続的にされてなり、前記ナントゲートの出力端
をキャパシタを介して前記コンパレータの入力端に接続
するとともに、第１の抵抗素子を介し、＝かつ第２の抵
抗素子とダイオードの直列回路を介してそれぞれ前記ナ
ントゲートの一方の入力端に接続してなるマルチバイブ
レークを有し、前記ナントゲートの他方の入力端に入力
交流をコンパレータと微分回路およびインバータを介し
て供給するように構成したことを特徴とする同期信号発
生回路。A Nant gate and a comparator configured with C-MOS are connected in a dependent manner, and the output terminal of the Nant gate is connected to the input terminal of the comparator via a capacitor, and the output terminal is connected to the input terminal of the comparator via a first resistance element. = and has a multi-by-break connected to one input terminal of the Nant gate through a series circuit of a second resistive element and a diode, and differentiates the input alternating current to the other input terminal of the Nant gate with a comparator. A synchronous signal generation circuit characterized in that it is configured to be supplied via a circuit and an inverter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP690083U JPS59114787U (en) | 1983-01-21 | 1983-01-21 | Synchronous signal generation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP690083U JPS59114787U (en) | 1983-01-21 | 1983-01-21 | Synchronous signal generation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59114787U true JPS59114787U (en) | 1984-08-02 |
| JPH0436229Y2 JPH0436229Y2 (en) | 1992-08-26 |
Family
ID=30138440
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP690083U Granted JPS59114787U (en) | 1983-01-21 | 1983-01-21 | Synchronous signal generation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59114787U (en) |
-
1983
- 1983-01-21 JP JP690083U patent/JPS59114787U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0436229Y2 (en) | 1992-08-26 |
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