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JPS59104566U - printed wiring board - Google Patents

printed wiring board

Info

Publication number
JPS59104566U
JPS59104566U JP19767682U JP19767682U JPS59104566U JP S59104566 U JPS59104566 U JP S59104566U JP 19767682 U JP19767682 U JP 19767682U JP 19767682 U JP19767682 U JP 19767682U JP S59104566 U JPS59104566 U JP S59104566U
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
electronic component
component mounting
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19767682U
Other languages
Japanese (ja)
Inventor
斎藤 和正
Original Assignee
日立電子株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立電子株式会社 filed Critical 日立電子株式会社
Priority to JP19767682U priority Critical patent/JPS59104566U/en
Publication of JPS59104566U publication Critical patent/JPS59104566U/en
Pending legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は印刷配線板に、フラットパック型電子部品を取
付けた状態を示す平面図、第2図は第1図のフラットパ
ック型電子部品接続用ランド及び導通穴(部品取付は穴
)を共用しているランド部のx−x’で切った断面図を
示す。第3図は第2図の1部を拡大したもので、aはデ
ィップソルダ等によるはんだ付前を示し、bははんだ付
後を示す。第4図aは、本考案の一実施例を示す第2図
A部に相当する断面図、bはその平面図を示す。 第5図a、  bはそれぞれ、本考案の他の実施例を示
す第2図A部に相当する断面図である。第6図は本考案
の応用例で、第4図しに相当する平面図である。 3・・・・・・フラットパック型電子部品のリード、4
・・・・・・フラットパック型電子部品接続用ランド及
び導通穴(部品取付は穴)を共用しているランド部、5
′・・・・・・フラットパック型電子部品リードとラン
ドを接続するはんだ合金層、7.8・・・・・・はんだ
付抵抗層。
Figure 1 is a plan view showing flat pack electronic components attached to a printed wiring board, and Figure 2 shares the flat pack electronic component connection lands and conductive holes (holes for component mounting) in Figure 1. A sectional view taken along line xx' of the land portion shown in FIG. FIG. 3 is an enlarged view of a part of FIG. 2, where a shows the state before soldering by dip soldering or the like, and b shows the state after soldering. FIG. 4a is a sectional view corresponding to part A in FIG. 2 showing an embodiment of the present invention, and FIG. 4b is a plan view thereof. FIGS. 5a and 5b are sectional views corresponding to section A in FIG. 2 showing other embodiments of the present invention. FIG. 6 shows an application example of the present invention, and is a plan view corresponding to FIG. 4. 3...Flat pack type electronic component leads, 4
・・・・・・Land portion that shares the flat pack type electronic component connection land and the conduction hole (the hole for component mounting), 5
′...Solder alloy layer connecting the flat pack type electronic component lead and land, 7.8... Soldered resistance layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定の隣接間隔で同一平面上に配置された複数のリード
を有する電子部品と印刷配線板上に配置された前記電子
部品接続用ラシド及び導通穴又は部品取付穴を共用して
いるランド部に、はんだ合金層を介して接続する印刷配
線板において、ディップソルダ等によるはんだ付時の熱
伝導等により前記はんだ合金層のフィレットの形状変化
及び流れ等を防止するためのはんだ付抵抗層を前記共用
ランド部の前記電子部品取付は部及び導通穴又は部品取
付穴の間に形成することを特徴とする印刷配線板。
an electronic component having a plurality of leads arranged on the same plane at predetermined adjacent intervals, and a land portion that shares the electronic component connection rashid and conduction hole or component mounting hole arranged on the printed wiring board; In a printed wiring board that is connected via a solder alloy layer, a soldering resistance layer is attached to the common land to prevent the shape change and flow of the fillet of the solder alloy layer due to heat conduction during soldering using dip solder or the like. A printed wiring board characterized in that the electronic component mounting portion of the portion is formed between the portion and the conductive hole or the component mounting hole.
JP19767682U 1982-12-29 1982-12-29 printed wiring board Pending JPS59104566U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19767682U JPS59104566U (en) 1982-12-29 1982-12-29 printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19767682U JPS59104566U (en) 1982-12-29 1982-12-29 printed wiring board

Publications (1)

Publication Number Publication Date
JPS59104566U true JPS59104566U (en) 1984-07-13

Family

ID=30423134

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19767682U Pending JPS59104566U (en) 1982-12-29 1982-12-29 printed wiring board

Country Status (1)

Country Link
JP (1) JPS59104566U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5381960A (en) * 1976-12-27 1978-07-19 Fujitsu Ltd Printed board
JPS5486766A (en) * 1977-12-22 1979-07-10 Tokyo Shibaura Electric Co Ic substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5381960A (en) * 1976-12-27 1978-07-19 Fujitsu Ltd Printed board
JPS5486766A (en) * 1977-12-22 1979-07-10 Tokyo Shibaura Electric Co Ic substrate

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