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JPS5887903A - Direct current power supply circuit driving power amplyfying circuit - Google Patents

Direct current power supply circuit driving power amplyfying circuit

Info

Publication number
JPS5887903A
JPS5887903A JP56186574A JP18657481A JPS5887903A JP S5887903 A JPS5887903 A JP S5887903A JP 56186574 A JP56186574 A JP 56186574A JP 18657481 A JP18657481 A JP 18657481A JP S5887903 A JPS5887903 A JP S5887903A
Authority
JP
Japan
Prior art keywords
circuit
power supply
voltage
output
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56186574A
Other languages
Japanese (ja)
Inventor
Kenichi Sato
憲一 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP56186574A priority Critical patent/JPS5887903A/en
Publication of JPS5887903A publication Critical patent/JPS5887903A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve the utilizing efficiency of power supply, by increasing the supply voltage to a circuit unit, when the envelope voltage of an input or output signal exceeds a prescribed value. CONSTITUTION:Power is applied to a circuit integrated circuit for general- pupose amplifier from ordinary terminals 27 and 28. A variable voltage in response to an amplification signal level is applied to power inputs 37, 38 of the output stage from PWM amplifying circuits 4, 4' via diodes 6, 6'. If a signal inputted to a terminal 1 exceeds an output voltage of the circuits 4, 4', switching transistors 8, 8' are conductive and the power supply path to output stage transistors 5, 5' is switched to a constant voltage power supply path applied to the terminals 27, 28. The efficiency of power supply of general-purpose amplifier can be improved by using externally mounted components.

Description

【発明の詳細な説明】 本発明はオーディオ用電力増幅回i′乙の駆動1ぼ副電
源回路に関するものであり、特に回路の損失を低下させ
て全体の電力変)突効率を向上させ得る直流電源回路な
/ (−’等の回路ユニットで構成した電力増幅回路に
適用して好適な回路配置を提供せんとするものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an auxiliary power supply circuit for driving an audio power amplification circuit, and in particular a DC power supply circuit that can reduce the loss of the circuit and improve the overall power conversion efficiency. The present invention is intended to provide a suitable circuit arrangement for application to a power amplifier circuit constructed of circuit units such as a power supply circuit or the like.

オーディオ用の増1嘔回路としては、従来よりA級増幅
回;賂、B級増幅回路などが知られており。
Conventionally, class A amplification circuits, class B amplification circuits, and the like have been known as audio amplification circuits.

実用に供されている増幅器のほとんどはこのいずれかの
方法をとる。このうち、出力が数10〜数1oorのも
のはいわ:φる電力増幅器(パワーアンプ)と称される
ものであって1回様にA級、B級が用いられるが、一般
(二は効率の点からはB級が又歪率等音響特性を重視す
る場合にはA級がそれぞれ採用されることが多い。これ
ら増幅回路方式の電力効率(ηA)(ηB)は、正弦波
信号について電源電圧を(+、Vc )−信号振幅を(
V 。
Most amplifiers in practical use use one of these methods. Among these, those with an output of several tens to several 1 oor are called power amplifiers, and class A and class B are used at the same time. Class B is often adopted from the viewpoint of The voltage is (+, Vc) - the signal amplitude is (
V.

)とすれば、それぞれ次式で示される、これら山(2)
式から明らかなよう(二、最大効率が得られるのは共に
信号振幅(Vo)が電源電圧に等しくなる時、即ち最大
出力時であって、それぞれA級にあっては7jACme
t3:)−50%、B級ではηB (rrLetx) 
= 78.5%となる。効率の点からはパJL/ス幅変
調(PWM PtLlse Width Modura
tion)方式のいわゆるD級増婦回路が公知である。
), these mountains (2) are respectively shown by the following equations.
As is clear from the equation (2), the maximum efficiency is obtained when the signal amplitude (Vo) is equal to the power supply voltage, that is, at the maximum output, and in the case of class A, 7jACme
t3:)-50%, ηB (rrLetx) in class B
= 78.5%. From the point of view of efficiency, path width modulation (PWM PtLlse Width Modulation)
A so-called class D multiplier circuit of the tion) type is well known.

これは負荷f二対し電源を高速でスイッチングして供給
し、このスイッチングのデユーティ(ON時闇とQ F
F M間の比率)を信号直二比例させることによって負
荷l二加わる平均的な電力をコントロールするものであ
る。’a力制御素子は理論的には導通又は遮断の伏報し
がないので、この部分の発熱μm]ち損失は無く、きわ
めて高い効率が潟られる事が知られているが1反面スイ
ッチングパルス波形の歪による高調波歪が環状では多く
、実用に供されている例は少ない。
This switches and supplies power to the load f2 at high speed, and the duty of this switching (darkness when ON and Q F
By making the ratio between F and M directly proportional to the signal, the average power applied to the load l2 is controlled. Theoretically, the force control element has no indication of conduction or interruption, so it is known that there is no heat generation μm in this part, and there is no loss, resulting in extremely high efficiency.However, on the other hand, it is known that the switching pulse waveform is distorted. There are many harmonic distortions in the annular shape, and there are few examples of it being put to practical use.

イ1)式陸び121式で示されるA級およびBIJk増
幅回路の理論効率曲線、(にD級増@器の実測効率曲線
の例を第1図に示す。
(1) Figure 1 shows examples of the theoretical efficiency curves of class A and BIJk amplifier circuits shown by formula 121, and the measured efficiency curves of class D amplifiers.

さて、このようなA級、B級増幅器の最大出力は、′4
源可圧CVD)と負荷抵抗面によって定まるが、勿論常
時最大出力で使用される事はない。
Now, the maximum output of such class A and class B amplifiers is '4
It is determined by the source voltage (CVD) and load resistance, but of course it is not always used at maximum output.

音楽信号の平均パワーエネルギーは最大パワー(ピーク
値)の1/8〜1/1Dである事が知られている。
It is known that the average power energy of a music signal is 1/8 to 1/1D of the maximum power (peak value).

従って、(1)又は(2)式から示されるように、これ
ら増幅器の実質的な効率はきわめて県いう例えばR−1
3Ωのスピーカに対し最大10oIVの出力が可能な#
4幅器に於て、IQFを出力した時の効率は・B級増幅
器で(2)式より この時、出力電力を(Pop、人力電力を(Pi)とす
ると、損失電力(Pi−Po)は即ちIQFの出力C二
対し30Fを損失させる訳であり、これは実に無駄な事
であるとぎわねばならない。これは最大パワーを供給す
るため(二必要な11i源電圧に対し、実際に出力する
信号の振幅は小さいので、この差の分が出力段素子に於
ける電圧降下として損失になる為である。これが若しも
電源電圧が常に出力信号振幅のピークに維持されるなら
ば、効率は78.5係で、損失電力は10×(。、78
.−1)−2,7Fで済む。
Therefore, as shown from equation (1) or (2), the actual efficiency of these amplifiers is extremely low, for example, R-1
Capable of outputting up to 10oIV to a 3Ω speaker #
In a 4-width amplifier, the efficiency when outputting IQF is - From equation (2) for a class B amplifier, if the output power is (Pop) and the human power is (Pi), then the loss power (Pi-Po) In other words, this results in a loss of 30F for the output C of the IQF, which is a waste.This is because in order to provide maximum power (2 Since the amplitude of the output signal is small, this difference becomes a loss as a voltage drop in the output stage element.If the power supply voltage is always maintained at the peak of the output signal amplitude, the efficiency will decrease. is 78.5, and the power loss is 10×(., 78
.. -1) -2.7F is sufficient.

このような点を考慮して1本願出源人は先よニ特願昭5
5−67276号を出願した。1口ち、増幅器の出力に
あわせて電源電圧を圧力信号振幅(二制御し、出力段素
子に於ける電圧降下を必要最小限にとどめて、この部分
で発生する損失を減少させ、増幅器全体の効率を改善す
る増幅器を提ギした。
Taking these points into consideration, the originator of a patent application should first file a patent application in
No. 5-67276 was filed. 1, the power supply voltage is controlled according to the pressure signal amplitude (2) in accordance with the output of the amplifier, and the voltage drop in the output stage element is kept to the necessary minimum, reducing the loss generated in this part, and reducing the overall amplifier output. We proposed an amplifier that improves efficiency.

更シニ詳説すると、増幅器の出力段を含む電力増幅部の
電導を可変電圧ll源とし、出力信号振幅の包絡変化、
即ち信号エンベロープにあわせてこれを制御する。また
可変電圧電源の制御信号は、出力信号を整流してこれを
得る。
To explain in more detail, the conduction of the power amplifier section including the output stage of the amplifier is made into a variable voltage source, and the envelope change of the output signal amplitude,
That is, it is controlled according to the signal envelope. Further, the control signal of the variable voltage power supply is obtained by rectifying the output signal.

この整流回路の応答連星を定める時定数のうち立上り時
間(アタックタイム)を定める立上り時定数は当然充分
小さく、且つこれに応答する可変電圧′4源の上昇遠賀
も可能な限り早められるが。
Of the time constants that determine the response binary of this rectifier circuit, the rise time constant that determines the rise time (attack time) is of course sufficiently small, and the rising distance of the variable voltage source 4 in response to this is as early as possible.

尚、かつ出力信号の急激な上昇に追随不可能な時には・
別途設けられた充分高い電圧の定電圧電源に一時的に切
換える。ここで、@配回変電圧電源は全電圧制御範囲に
わたって高効率が維持されなければならず、従って、か
かる酸m装置として特≦ニパルス幅変調方式のスイッチ
ング’il!瀞(以後PWM電源と略記する)を採用し
て、これを実現している。以下第2図にもとづきこの種
増幅器の具体的内容を詳述する。
In addition, when it is impossible to follow the sudden rise in the output signal,
Temporarily switch to a separately provided constant voltage power supply with a sufficiently high voltage. Here, the @distributed variable voltage power supply must maintain high efficiency over the entire voltage control range, and therefore, as such an acid m device, it is especially important to switch the pulse width modulation method! This is achieved by using a power supply (hereinafter abbreviated as PWM power supply). The specific contents of this type of amplifier will be explained in detail below based on FIG.

第2図はこの種増幅器の原理を説明するブロツり図であ
ろう囲ち、入力端千山1:入力した信号はA級又はB級
の電圧増幅回路+21にて増幅されると同時に入力信号
を整流する整流回路等からなる人力信号の包絡電圧発生
回路(3)を経てPWM増幅回路(4)に人力する。該
PWM増幅回路(4)の出力は電圧増幅回路(2)に縦
続する電力増幅回路(5)の可変直流電導として図示の
如くダイオード(6)を介して接続する、一方別途設け
られた定電圧直流電源供給回路(7)はトランジスタ1
81を介して電力増幅回路(5)に電力を供給するが、
該トランジスタ+81は図示の通り電圧増幅回路(2)
側にレベルシフト回路(信号レベル変換回路)(9)を
介して七のペースが接続されるエミッタホロワ型である
為、ペース電位がエミッタ電位即ちPWM増幅回路(4
)の出力電圧よりも低い時は逆バイアスされ、カットオ
フ状態となっている、この場合1題力増幅回路+51の
電源は前記PIVM回路+41により与えられる。電圧
増幅回路(2)の出力信号に一定のit&分を付加した
一11記トランジスタ(8)のベース′罐位がPWM回
路(4)の出力を越えると、トランジスタ(8)はエミ
ッタホロワ接続として能動状態に入り、定電圧直流電源
(7)より電源を受けて電力増幅回路+51を略ペース
゛償位に附勢する、この時ダイオ−トイ6)は逆7大イ
アス状りとなって、電流がPiVMm路イ4)側に逆流
するのを防止する。尚qOは出力端子である。また、整
流回路(3)の人力は電圧増幅回路(2)、fたけ出力
端子rmより供給される場合もあろう 上述の如く構成した場合、’i4i柳電圧が増@器の出
力信号振幅に制御されるため、出力段素子での電圧降下
を必要最小限f二とどめ、この部分で発生する損失を°
々しく11i!!しさせることができる、次に斯る゛電
力増幅回路の具体例を第3図に不す。
Figure 2 is a block diagram explaining the principle of this type of amplifier. The signal is manually input to the PWM amplification circuit (4) through an envelope voltage generation circuit (3) consisting of a rectifier circuit for rectifying the signal. The output of the PWM amplifier circuit (4) is connected via a diode (6) as shown in the figure as a variable DC conductor of a power amplifier circuit (5) cascaded to the voltage amplifier circuit (2), while a separately provided constant voltage The DC power supply circuit (7) is transistor 1
Power is supplied to the power amplifier circuit (5) via 81,
The transistor +81 is a voltage amplification circuit (2) as shown in the figure.
Since it is an emitter follower type in which the 7th pace is connected via the level shift circuit (signal level conversion circuit) (9) on the side, the pace potential is the emitter potential, that is, the PWM amplifier circuit (4).
), it is reverse biased and in a cutoff state. In this case, the power for the power amplifier circuit +51 is supplied by the PIVM circuit +41. When the base position of the 111th transistor (8), which adds a certain value to the output signal of the voltage amplification circuit (2), exceeds the output of the PWM circuit (4), the transistor (8) becomes active as an emitter-follower connection. It enters the state, receives power from the constant voltage DC power supply (7), and energizes the power amplifier circuit +51 to approximately the pace compensation level. At this time, the diode 6) becomes like an inverted 7-large IA, and the current increases. Prevents backflow to the PiVMm path A4) side. Note that qO is an output terminal. In addition, the human power of the rectifier circuit (3) may be supplied from the voltage amplifier circuit (2) and the output terminal rm of the f output terminal.If configured as described above, the 'i4i willow voltage will change to the amplitude of the output signal of the amplifier. Since it is controlled, the voltage drop at the output stage element is kept to the necessary minimum f2, and the loss occurring in this part is minimized.
Lively 11i! ! A specific example of such a power amplifier circuit that can be used is shown in FIG.

即ち、入力端子(1)に入力された信号はトランジスタ
+141 Qfl−抵抗器(1Δ口3、績び定電流源0
0によって構成される差動増幅器によってイ圧増幅され
た後。
That is, the signal input to the input terminal (1) is the transistor + 141 Qfl - resistor (1 Δ port 3, constant current source 0
After being amplified by a differential amplifier configured by 0.

ツェナーダイオード等のレベルシフト素子+211 B
 8よりなる信号レベル変換1−1路を具@するトラン
ジスタ■、抵拉器09例によって構成されるm幅段で−
に゛覗圧増幅されろう又レベルシフト素子(2)の両端
には出力段トランジスタf5M51θ)ペースがそれぞ
れ接続され、該トランジスタC二より電力#11渇され
た後、出力端子Qfjに出力される7ここで、出力段ト
ランジスタ+51151へは、出力端子QOからの出力
信号を整流する整流回路+31131の出力信号を増幅
する百流躯動電源が供給されており、桟電源電圧は増幅
信号レベルに応じて変化しているうスイッチングトラン
ジスタ(8)のペースはレベルシフト素子罰の正側端子
に、また、スイッチングトランジスタ(8fのペースは
レベルシフト素子(至)ノ負側端子1:それぞれダイオ
ード(至)(至)を介しで接続されており、これらトラ
ンジスタ+8118’lのベース電位、すなわち電圧増
11’1! トランジスタ(イ)の出力信号がPWM増
幅回路+41または+41の出力電位を毬えた時、スイ
ッチング、トランジスタ+81 +81が導通するので
、出力段トランジスタ+51 +51への電源供給経路
は端子@(5)へ供給されている定電圧電源側へ切換わ
る。尚、抵抗(至)は帰還用抵抗、又抵vcanaηは
トランジスタa滲α9のペースを回路グランドへ接続す
るためのものである。
Level shift element such as Zener diode +211 B
A signal level conversion circuit consisting of 8 transistors and 09 resistors constitutes an m-width stage.
The output stage transistor f5M51θ) is connected to both ends of the level shift element (2), and after the power #11 is drained from the transistor C2, the output voltage is outputted to the output terminal Qfj. Here, the output stage transistor +51151 is supplied with a 100-current rotary power supply that amplifies the output signal of the rectifier circuit +31131 that rectifies the output signal from the output terminal QO, and the crosspiece power supply voltage varies depending on the amplified signal level. The pace of the switching transistor (8) that is changing is connected to the positive terminal of the level shift element (8f), and the pace of the switching transistor (8f) is connected to the negative terminal 1 of the level shift element (to), respectively, to the diode (to) ( When the output signal of the transistor (a) exceeds the output potential of the PWM amplifier circuit +41 or +41, switching occurs. Since the transistors +81 +81 are conductive, the power supply path to the output stage transistors +51 +51 is switched to the constant voltage power supply supplied to the terminal @(5).The resistor (to) is a feedback resistor or a resistor. vcanaη is for connecting the conductor of transistor a9 to the circuit ground.

以上説明した具体例は、tべて個別部品で構成されてい
るため断る電力増幅回路を実現することは容易であるう
しかし1通常の電力増幅器に比較して部品点数が多くな
り、この点を改咎するため例えば電圧増幅回路び出力段
トランジスタを含む回路部分子二汎用の集積回路を使用
する場合は1次のような理由で実用がI帷しくなる。す
なわちl凡用のパワーアンプ用集積回路は第4図の破線
内に示される回路構成が一般的であり、文人出力端子も
端子■〜(41)に示f必要最小限しか具媚されていな
いσ)が普通であるため−+iiJ記第6図(二示−t
+ランジスタ(8)または18)を駆動「る信号が取れ
yzいということである。
In the specific example explained above, it is easy to realize a power amplifier circuit because it is composed of individual parts. However, the number of parts is larger than that of a normal power amplifier, For example, if a general-purpose integrated circuit is used for a circuit component including a voltage amplification circuit and an output stage transistor, it will be difficult to put it into practical use for the following reasons. In other words, the general-purpose power amplifier integrated circuit generally has the circuit configuration shown within the dashed line in Figure 4, and the literati output terminals are also shown in terminals ~ (41). Since σ) is normal, −+iiJ, Figure 6 (2-t
This means that it is difficult to obtain a signal that drives the transistor (8) or 18).

こノ点に濫み、本発明はσL用のパワーアンプ用集積回
路等の回路ユニット(二適用できる回路構成を提供する
ものであり、七の実施例を第4図(二示fo f’xわ
ちAiJ述のよう直二破線内は汎用のパワーアンプ用集
積回路であり、該入出力端子は、端子0優が音声1g号
の非反転入力、端子(至)が音声信号の反転入力、端子
・→が″、電圧増幅段のグラス゛催鵬入力、端子(ロ)
が出力段のプラス′電源入力、端子(至)が出力段のマ
イナス電源入力、端子(至)が電圧増幅段のマイナス1
i源入力、端子00が音声信号の出力、そして端子(4
1)が回路グランドとなっている。
In view of this point, the present invention provides a circuit configuration that can be applied to a circuit unit (2) such as a power amplifier integrated circuit for σL, and seven embodiments are shown in FIG. That is, as stated in AiJ, the area within the straight two broken lines is a general-purpose integrated circuit for power amplifiers, and the input/output terminals are terminals 0 and 1, which are non-inverting inputs for audio signals 1g, terminals (to) and inverting inputs for audio signals, Terminal → is ", voltage amplification stage glass input, terminal (b)
is the positive power input of the output stage, the terminal (to) is the negative power input of the output stage, and the terminal (to) is the negative 1 of the voltage amplification stage.
i source input, terminal 00 is the audio signal output, and terminal (4
1) is the circuit ground.

電圧増幅段の電導入力(至)(至)へは端子−(至)へ
接続された定電圧電源により一定電圧が供給されており
、一方出力段の′@源入力@(ト)へはダイオード(6
)ル(二応じた可変電圧が供給されていることは、@述
の第3図と固−であるが、スイッチングトランジスタ(
8)績び(8)は入力端子(1)からの信号を増幅する
演算増嘔器c3n、抵抗翰及び抵抗(至)によって構成
されるイ圧増幅器の出力信号をレベルシフト素子+21
1及び抵抗(イ)、またはレベルシフト素子ノ績び抵V
C(ト)によって一定電圧だけレベルシフトされた信号
により駆動され、必要な時に集積回路の出力段電源入力
端子(ロ)または(至)へ一定電圧を供給するよう構成
されているう尚、抵仇翰の値と抵抗(7)の値との比は
・抵抗0ηの値と抵vr、(2)の値との比と略等しく
設定されろう斯かる構成によれば、汎用の集積回路を使
用した場合でも、前述のPIVM増幅回路+41+41
の可変電圧出力が増幅信号(二追従できないときに動作
させるトランジスタ181+8′lの駆動信号を得るこ
とができる。
A constant voltage is supplied to the current input input (to) (to) of the voltage amplification stage by a constant voltage power supply connected to terminal - (to), while a diode is connected to the output stage's source input (g). (6
) The fact that a variable voltage is supplied according to the switching transistor (2) is consistent with Figure 3 mentioned above.
8) The output signal of the pressure amplifier (8), which is composed of the arithmetic amplifier c3n that amplifies the signal from the input terminal (1), the resistor wire, and the resistor (to) is transferred to the level shift element +21.
1 and resistance (A), or level shift element resistance V
The resistor is driven by a signal whose level is shifted by a constant voltage by C (g), and is configured to supply a constant voltage to the output stage power input terminal (b) or (to) of the integrated circuit when necessary. The ratio between the value of the resistor and the value of the resistor (7) will be set approximately equal to the ratio of the value of the resistor 0η and the value of the resistor vr, (2). According to such a configuration, a general-purpose integrated circuit can be used. Even when using the above-mentioned PIVM amplifier circuit +41+41
The variable voltage output of the amplified signal (2) can provide a drive signal for the transistor 181+8'l which is activated when tracking is not possible.

尚、可変直流電源供給回路であるF#M増幅回路+41
 +41に使用する信号の包絡″4圧発生回路13)1
31への供給信号としては入力端子(1)の信号を直接
使用してもよく、また、演算増幅器3Bへの人力信号と
して出力屓力増幅回路+5115’lの出力端QOの出
力信号を使用してもよい。ただ、この出力端子IIOの
信号は入力端子(1)よりも遅れを生じている為、演算
増幅器C11lの入力信号として使用すると、スイッチ
ングトランジスタ+81+8’lの動作が出力段トラン
ジスタ151151の人力信号よりも遅れることになり
、余り好ましくない。
In addition, F#M amplifier circuit +41 which is a variable DC power supply circuit
Envelope of signal used for +41 ``4 pressure generation circuit 13) 1
The signal at the input terminal (1) may be used directly as the signal supplied to the operational amplifier 31, or the output signal at the output end QO of the output force amplification circuit +5115'l may be used as the manual signal to the operational amplifier 3B. It's okay. However, since the signal at the output terminal IIO is delayed from the input terminal (1), when used as an input signal to the operational amplifier C11l, the operation of the switching transistor +81+8'l is slower than the human input signal of the output stage transistor 151151. It means I'm going to be late, which I don't like.

上述の如く1本発明の電力増幅回路の駆動1■流′纜源
回路5二よれば、汎用のパワー、アンプ用集積回路等の
回路ユニットを使用できるので1部品点数Q)少ない安
価でしかも小型且つ軽量の高効率′亀力増1嘔器が得ら
れる。
As mentioned above, according to the power amplifier circuit drive 1 of the present invention, the flow source circuit 52 allows the use of circuit units such as general-purpose power and amplifier integrated circuits. Moreover, a lightweight and highly efficient tortoise force increasing device can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は増幅器の効率特性を示す図面、第2図は1!瀝
醒圧を制aすることにより高効率を得る電力増幅回路の
駆動直流電源回路のブロック図、第6図は本発明の電力
増幅回路の駆動直流電源回路を説明するための回路図、
第4図は本発明の電力増幅回路の駆動直流電源回路の具
体的実施例である。 (1)・・・入力端子、 +21f141Q5圓・・・
電圧増幅回路、(3)・・・包i電圧発生回路、+4+
(4’+・・・パルス幅増暢回路(可変直流1!洋供給
回路) 、+51+5’+・・・電力増幅回路、(6)
(61・・・一方向導電素子、+71UcJ・=定電圧
直流電源供給回路、 5osf・・・スイッチング、ト
ランジスタ、(9)lメ1             
活ぼ   刊)     q     、31砿1
Figure 1 is a diagram showing the efficiency characteristics of the amplifier, and Figure 2 is 1! FIG. 6 is a block diagram of a driving DC power supply circuit for a power amplifier circuit that obtains high efficiency by controlling the aspirating pressure a; FIG. 6 is a circuit diagram for explaining the driving DC power supply circuit for a power amplifier circuit of the present invention;
FIG. 4 shows a specific embodiment of a driving DC power supply circuit for a power amplifier circuit according to the present invention. (1)...Input terminal, +21f141Q5 circle...
Voltage amplification circuit, (3)...Envelope i voltage generation circuit, +4+
(4'+... Pulse width amplification circuit (variable DC 1! Western supply circuit), +51+5'+... Power amplifier circuit, (6)
(61...unidirectional conductive element, +71UcJ=constant voltage DC power supply circuit, 5osf...switching, transistor, (9)lme 1
Published by Katsubo) q, 31 Kori 1

Claims (1)

【特許請求の範囲】[Claims] (1)  入力信号の印加される人力信号端子および直
流駆動電源供給端子を啼える電圧増幅回路と該電圧増幅
回路(二縦続接続されると共に出力信号端子およびl直
流駆動電源供給端子を噛える電力増幅回路とを具備する
回路ユニットと、前記入力信号端子或は前記出力信号端
子の信号の包路線電圧を発生させるための包絡電圧発生
同格と、該回路の出力色終電圧に応じて出力電圧が変化
する可変m流電源供給回路と、該可変II直流源供給回
路と前記電力増幅1!2回路の直流駆動電源供給端子間
に直列に該可変直流電源供給回路から電流が供給される
方向に接続される一方向導電素子と、前記人力信号端子
或は前記出力信号端子の信号を増幅する増幅回路と、該
・−幅面路の出力信号端子を越える振号レベルC二信号
を変換する信号レベル変換回路と。 該レベル変換回路の出力により0N−OFF制御され且
つ前記電力増幅回路の1ぼ流駆動電源供給端子と定′岨
圧l百流電源供給回路間に1百列に接続されるスイッチ
ング1り1路とを備え一@記信号レベル変換回路の出力
信号が前記可変直流電源供給回路の出力電圧よりも大き
くなる時、前記定電圧II流電源供給回路力)ら前記′
イカ増幅回路に直流駆動環源を供給することを特徴とす
る電力増幅回路の駆動直流″4源101路、
(1) A voltage amplification circuit that connects the human input signal terminal and the DC drive power supply terminal to which input signals are applied; a circuit unit comprising an amplifier circuit, an envelope voltage generation apposition for generating an envelope voltage of a signal of the input signal terminal or the output signal terminal, and an output voltage according to an output color final voltage of the circuit; A variable m-current power supply circuit that changes, the variable II DC source supply circuit, and the DC drive power supply terminals of the power amplifier 1 and 2 circuits are connected in series in the direction in which current is supplied from the variable DC power supply circuit. an amplifier circuit for amplifying the signal of the human input signal terminal or the output signal terminal; and a signal level converter for converting the amplitude level C signal exceeding the output signal terminal of the width surface road. A switching circuit 1, which is ON-OFF controlled by the output of the level conversion circuit and connected in a 100-row line between the 1 current drive power supply terminal of the power amplifier circuit and the constant voltage 100 current power supply circuit. When the output signal of the signal level conversion circuit becomes larger than the output voltage of the variable DC power supply circuit, the constant voltage II current power supply circuit power
101 paths of ``four direct current driving sources for a power amplifier circuit, characterized by supplying a direct current driving ring source to the squid amplifier circuit;
JP56186574A 1981-11-19 1981-11-19 Direct current power supply circuit driving power amplyfying circuit Pending JPS5887903A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56186574A JPS5887903A (en) 1981-11-19 1981-11-19 Direct current power supply circuit driving power amplyfying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56186574A JPS5887903A (en) 1981-11-19 1981-11-19 Direct current power supply circuit driving power amplyfying circuit

Publications (1)

Publication Number Publication Date
JPS5887903A true JPS5887903A (en) 1983-05-25

Family

ID=16190914

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56186574A Pending JPS5887903A (en) 1981-11-19 1981-11-19 Direct current power supply circuit driving power amplyfying circuit

Country Status (1)

Country Link
JP (1) JPS5887903A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06244645A (en) * 1993-02-17 1994-09-02 Nec Corp Amplifier circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06244645A (en) * 1993-02-17 1994-09-02 Nec Corp Amplifier circuit

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