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JPS5864114U - Microwave integrated circuit frequency multiplier - Google Patents

Microwave integrated circuit frequency multiplier

Info

Publication number
JPS5864114U
JPS5864114U JP15812981U JP15812981U JPS5864114U JP S5864114 U JPS5864114 U JP S5864114U JP 15812981 U JP15812981 U JP 15812981U JP 15812981 U JP15812981 U JP 15812981U JP S5864114 U JPS5864114 U JP S5864114U
Authority
JP
Japan
Prior art keywords
frequency multiplier
integrated circuit
microwave integrated
circuit frequency
dielectric substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15812981U
Other languages
Japanese (ja)
Inventor
近藤 秀敏
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP15812981U priority Critical patent/JPS5864114U/en
Publication of JPS5864114U publication Critical patent/JPS5864114U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の周波数逓倍器を説明する構成図、第2図
は本考案の実施例による周波数逓倍器を説明する構成図
、第3図は本考案の実施例による周波数逓倍器の平面図
、第4図は同断面図、および第5図は本考案の他の実施
例による周波数逓倍器の構成図である。 1・・・バラクタダイオード、2・・・入力側共振器、
3・・・出力側共振器、4・・・出力帯域通過ろ波器(
BPF入5・・・誘電体共振器、6・・・入力帯域通過
名波器(LPF )または帯域通過ろ波器(BPF)、
7・・・バイアス抵抗、8・・・RFチョーク線路、9
・・・出力端子、10・・・MIC基板、11・・・支
持台、12・・・金属ケース、13・・・誘電体共振器
FIG. 1 is a block diagram explaining a conventional frequency multiplier, FIG. 2 is a block diagram explaining a frequency multiplier according to an embodiment of the present invention, and FIG. 3 is a plan view of a frequency multiplier according to an embodiment of the present invention. , FIG. 4 is a sectional view of the same, and FIG. 5 is a configuration diagram of a frequency multiplier according to another embodiment of the present invention. 1... Varactor diode, 2... Input side resonator,
3...Output side resonator, 4...Output bandpass filter (
BPF included 5...Dielectric resonator, 6...Input bandpass filter (LPF) or bandpass filter (BPF),
7...Bias resistance, 8...RF choke line, 9
... Output terminal, 10... MIC board, 11... Support stand, 12... Metal case, 13... Dielectric resonator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 誘電体基板と、その上に装架されたバラクタダイオード
と、その入力端および出力端にそれぞれ接続された入力
帯域通過ろ波器および出力帯域通過ろ波器と、前記バラ
クタダイオードと前記出力゛帯域ろ波器とを接続する線
路と結合されて設置された誘電体共振器とを具備するこ
とを特徴とするマイクロ波集積回路化周波数逓倍器。
a dielectric substrate, a varactor diode mounted on the dielectric substrate, an input bandpass filter and an output bandpass filter connected to the input and output ends of the dielectric substrate, and the varactor diode and the output band. A microwave integrated circuit frequency multiplier comprising a dielectric resonator coupled to a line connecting to a filter.
JP15812981U 1981-10-23 1981-10-23 Microwave integrated circuit frequency multiplier Pending JPS5864114U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15812981U JPS5864114U (en) 1981-10-23 1981-10-23 Microwave integrated circuit frequency multiplier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15812981U JPS5864114U (en) 1981-10-23 1981-10-23 Microwave integrated circuit frequency multiplier

Publications (1)

Publication Number Publication Date
JPS5864114U true JPS5864114U (en) 1983-04-30

Family

ID=29950632

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15812981U Pending JPS5864114U (en) 1981-10-23 1981-10-23 Microwave integrated circuit frequency multiplier

Country Status (1)

Country Link
JP (1) JPS5864114U (en)

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