JPS58174816A - Weitgh measuring device - Google Patents

Abstract

PURPOSE:To improve accuracy by using an A/D converter, wherein a reference voltage generator is provided and which can be operated with respect to positive and negative inputs, and imparting bias voltage to a load cell. CONSTITUTION:The load cell 2 outputs a load cell output Ei from contact points (a) and (b) of resistors 201-204, whose resistances are changed by the strain of a load receiving part, while the load cell 2 is connected to a DC amplifier 3. The output of the DC amplifier 3 is outputted to the A/D converter 7 including the reference voltage generator 706. The A/D converter 7 is operated with respect to both positive and negative input voltages. Therefore a potentiometer 902 of a bias circuit 9 is adjusted so that the input voltage level to the A/D converter 7 becomes just zero, e.g. the weight of Wn/2 that is 1/2 the maximum load Wn is applied to the load cell.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a weight measuring device using a load cell.

Conventionally, various weight measuring devices using load cells have been known, but the load cells used in such devices output only a voltage signal in one direction in response to a load. That is, in a device that outputs a voltage signal of vmax at the maximum load, the voltage signal is output in the range of 0 to Vmax with respect to the load. In conventional devices using such load cells, the output of the load cell is amplified by an amplifier and input directly to a converter to be converted into a digital load signal, so a unipolar A/D converter is used. Or, even if a bipolar type was used, only one of the polarities was used. For this reason, for example, even if a bipolar device has a resolution that allows a load signal of 60,000 counts to be obtained for the input voltage over the entire negative to positive range, only one polarity is used. Therefore, there was a problem in that a resolution of only 30,000 counts could be obtained with respect to the input voltage, and sufficient accuracy in weight measurement could not be obtained.

Also, for example, it is conceivable to use a unipolar A/D converter with a resolution of 60,000 counts for the input voltage, but such a converter is highly accurate. There is a problem in that it requires expensive products and is not suitable for practical use.

This invention was made in order to solve such problems, and is an A that can operate with inputs of both positive and negative polarities, and is equipped with a reference voltage generator that generates reference voltages of both positive and negative polarities. /
It is an object of the present invention to provide a weight measuring device that can make full use of the characteristics of a D converter, can measure weight with high precision, is highly economical, and is fully suitable for practical use.

This invention uses an A/1) converter that is equipped with an internal reference voltage generator and is operable with inputs of both positive and negative polarities, and has a bias circuit at the output of the load cell.
The above purpose can be achieved by applying a bias voltage so that the input level to the A/1) converter becomes exactly zero when a load approximately sufficient to the maximum load is applied to the load cell. .

Embodiments of the present invention will be described below with reference to the drawings.

1 is a reference voltage power supply, 2 is a load cell, and 3 is a direct current amplifier, which are integrated and built into a case 4 in close proximity to each other so that the temperature conditions are always the same. The reference voltage power supply 1 includes a DC power supply 10 and operational amplifiers 102 and 103. The positive terminal of the power supply 101 is connected to the non-inverting input terminal (+) of the operational amplifier 102, and the negative terminal of the power supply 101 is connected to the non-inverting input terminal (+) of the operational amplifier 102. The above operational amplifier 1
It is connected to the non-inverting input terminal (+) of 03. A resistor 104 is connected between the inverting input terminal (-) of the operational amplifier 102 and the output terminal of the amplifier 102, and a resistor 104 is connected between the inverting input terminal (-) of the operational amplifier 1020 and ground.
05 is connected. Further, a resistor 106 is connected between the output terminal of the operational amplifier 102 and the inverting input terminal (-) of the operational amplifier 1030, and the operational amplifier 103
A resistor 1θ7 is connected between the 0 inverting input terminal (-) and the output terminal of the amplifier 103. Although the DC power supply 101 of the reference voltage power supply 1 is not grounded, a reference voltage is obtained by the circuitry of the operational amplifiers 102 and 103.

A resistor 10 is connected between the output terminal of the operational amplifier 103 and ground.
8,109 series circuits are connected. Further, a series circuit of a resistor 90, a potentiometer 902, and a resistor 903 forming the bias circuit 9 is connected between the output terminal of the operational amplifier 103 and the ground.

The load cell 2 has a resistor 201 attached to the load receiving part.
It consists of a Pritsuno circuit with four sides 202, 203, and 204, and includes resistors 201, 203, and resistors 202, 20.
4 are provided facing each other. The resistance value of each of these resistors 201 to 204 changes depending on the distortion of the load receiving part, and the resistance values of resistors 201 and 203 change in a decreasing direction, and the resistance values of resistors 202 and 204 change in an increasing direction. ing. Further, the load cell 2 has a resistor 2
A resistor 2θ5 is further interposed in series with the resistor 201 on the side where the resistor 201 is located, and a resistor 2θ5 is interposed to adjust the output voltage E1 to a specified value when the load cell 2 is under no load, and the side where the resistor 2θ4 is located. Furthermore, a resistor 206 is interposed in series with the resistor 204 to make the temperature coefficient of the strain resistor zero. Then, the connection point between the side where the resistor 201 is located and the side where the resistor 204 is located is connected to the positive terminal of the cocoon heavy DC power supply 10 via the sensitivity temperature coefficient adjusting resistor 207, and The connection point between the side where the resistor 204 is located and the side where the resistor 204 is interposed is connected to the negative terminal of the DC power supply ioi. The sensitivity temperature coefficient adjusting resistor 207 is for correcting the temperature coefficient of Young's modulus of the load receiving member. And the side where the resistor 204 is intervening and the resistor 203
A load cell output enable signal is output between a connection point a between the side where the resistor 201 and the resistor 202 exist. Note that the connection point is grounded.

The DC amplifier 3 is connected between the connection points a and b via a resistor 5, and a low-pass filter 6 is connected in parallel between the load cell 2 and the amplifier 3. The low-pass filter 6 is used to cut the alternating current component superimposed on the load cell output. The DC amplifier 3 consists of an operational amplifier 30 and four first to fourth analog switches 302, 303, 3047305, and the connection point a of the load cell 2 connects the resistor 5 and the first analog switch 302 in series. Operational amplifier 301 through
Connected to the non-inverting input terminal (+) of A series circuit of a second analog switch 303 and a resistor 310 is connected between the non-inverting input terminal (+) of the amplifier 301 and ground. A series circuit of resistors 306 and 30'l is connected between the output terminal of the operational amplifier 301 and the ground, and the third analog switch 3θ4 is further connected through a capacitor 308 and a resistor 309 in series. The connection point with the resistors 306 and 307 is connected to the operational amplifier 3.
It is connected to the inverting input terminal (-) of 01. The DC amplifier 3 connects the output of its operational amplifier 301 to a capacitor 308.
, resistor 309 and fourth analog switch 305 in series. The movable terminal of the potentiometer 902 of the bias circuit 9 is connected to the connection point between the second analog switch 3θ3 and the resistor 310.

The output of the DC amplifier 3 is input to an A/D converter 7. The A/D converter 7 includes a reference voltage generator 706 consisting of fifth to eighth four analog switches 701, 702, 703, 7θ4 and a capacitor 2θ5, an integrator 708 consisting of an operational amplifier 707, a buffer annoir 09, Con/Materator 710. A ninth analog switch 711 is formed by a control circuit 713 that houses a clock pulse counter 712 therein. The reference voltage generator 7θ6 includes four analog switches 701 to 7.
04 to form a Britno circuit, switches 701 and 702
A capacitor 705 is connected between the connection point of and the connection point of switches 703 and 704, and the output of the DC amplifier 3 is supplied to the non-inverting input terminal (+) of the buffer amplifier f209 via the capacitor 705. ing. The connection point between the analog switches 701 and 704 is connected to the connection point between the resistors 108 and 109 of the image reference voltage power source 1, and the connection point between the analog switches 703 and 704 is grounded. The output terminal of the buffer undef 09 and the inverting input terminal (-) are short-circuited.

The output terminal of the buffer annor 09 is connected to the inverting input terminal (-) of the operational amplifier 701 via a resistor 714. The non-inverting input terminal (+
) and ground, and a capacitor 716 between the inverting input terminal (-) and the output terminal.
is connected. The output terminal of the operational amplifier 707 is connected to the inverting input terminal (-) of the converter/f regulator 710. A DC power supply 217 is connected between the non-inverting input terminal (+) of the converter 9 regulator 710 and the ground, with the ground side being the positive terminal.
is connected. The ninth analog switch 71 is connected between the output terminal of the comparator 710 and the non-inverting input terminal (+) of the operational amplifier 7θ7. A control circuit 713 operates according to the output of the comparator/leveller 710.

Also, 8 is a switch controller, and this controller 8
are driven by the control circuit 713 and each of the analog switches 302, 303.

304.305.701.702.703.

704.711 is designed to open and close. Specifically, at time t1, the control circuit 713 causes the controller 8 to control the second. 4th. 6th. A command is given to close only the 7th and 9th analog switches 303, 305, 702, 703 and 711.

Then, the control circuit 713 controls this state so that it continues for a period T during which its own clock pulse counter 712 counts a predetermined number of clock pulses. At time tt when this period T1 ends, the control circuit 713 now controls the controller 8 to switch the eleventh and third analog switches 3θ2, 3.
A command is given to close only θ4. and control circuit 71
3 indicates the state by its own clock, +rus counter 712
is controlled so that it continues for a period T during which it counts a predetermined number of clocks/mother pulses. Also, just before the end of the period T, the control circuit 713 determines whether the polarity of the input voltage to the buffer amplifier f709 is positive or negative based on the output of the converter/f regulator 710, and sends the result to the controller. 8. The controller 8 closes the fifth analog switch 701 when the polarity of the input voltage is positive and closes the eighth analog switch 704 when the polarity of the input voltage is negative at the timing when the period T8 ends. Of course, all other analog switches are open at this time. This period T
At time t when , ends, the odor causes the control circuit 713 [its own clock pulse counter 712 to count the clock pulses again. This counting operation is now stopped when the output of the comparator 710 reaches zero. This stop time is designated as t, and the count number counted by the clock counter 712 during the period T3 provides diary weight measurement information.

The operation of the apparatus according to the embodiment of the present invention is as follows. That is, now the voltage of the DC power supply 101 is "l", and the resistor 2 is
01, 202, 20.9.

204 resistance value respectively R1r R1+ R3rR4
, the resistance values of resistors 205, 206, and 207 are RZ
If r RZT + R8, output E of load cell 2
From the relationship shown in Figure 2, i becomes... (1). So, for example, R,= R1= R,= R4=
If the resistance change when a load is applied to the load cell 2 at R is δ, the above equation (1) becomes as follows. Now, if we set R2ζRZT, the above equation (2) is clear. Since δ is the output proportional to the load, load cell 2
The rated load is Fn, the applied load is F, so the above (3)
The formula becomes fi. The output Ei of the load cell 2 is inputted to the DC amplifier 3 after the superimposed AC component is cut by the low-pass filter 6 .

Now, at time t1, the analog switches 303 and 305 are activated by the switch controller 8.

When 702, 703, and 711 are closed, the operational amplifier 301 in the DC amplifier 3 determines the difference voltage between its own offset voltage V301 and the voltage set in the bias circuit 9 using resistors 306 and 307, and the voltage A I (viot
VQ) is output. This voltage A I (vio
t v, ) = t 77” Sensors 30, 8, Resistors 3
09, the capacitor 308 is charged by the fourth analog switch 3050 circuit. On the other hand, reference voltage power supply 1
The output of the operational amplifier 103 is (1+A t ) (E
t +V+os V+o*).

Therefore, the reference voltage -■ is supplied from the reference voltage power supply 1 to the A/'D converter 70 and the reference voltage generator 706.

Hato becomes. Therefore, when the analog switches 702 and 703 close at the time, the analog switches 702 and 703 close,
The capacitor 705 is charged with −V with the illustrated polarity through the path of the capacitor 7θ5 and the analog switch 703. Furthermore, at time t1, the analog switch 711
is closed, negative feedback roots are formed from the output terminal of the comparator 710 to the non-inverting input terminal (+) of the operational amplifier 707 of the integrator 708.
Since the integrator 708 acts to always make the differential input voltage to zero zero, the integrator 708 stops integrating. This state continues for a period T1 from time t1 to time t1.1.

At time t3, analog switch 303°305.7
02,703,711 is opened, and the first. The third analog switch 302-304 is closed. Then, the output El of the load cell 2 is amplified by the DC amplifier 3, and the output of the operational amplifier 301 becomes AI'' (Ei
+Vso+). By the way, during the period TI, the capacitor 308 is charged with the voltage A, .V3QI, and is held by opening the analog switch 305, so that the output of the DC amplifier 3, that is, the third analog switch 3θ4 output cover A, . El+Vso+) AI(Vso+Ve)−
It becomes AI (Ei Ve). This is the operational amplifier 301
This shows that the offset voltage V3G+ has been removed. Further, it is shown that the third analog switch 3θ4 output can be arbitrarily set to either positive or negative polarity by setting the bias circuit 9. This analog switch 304 output is A,
/b converter 70 input, and this value changes between positive and negative depending on the load applied to the load cell 2. This signal voltage -AI (El -V, ) is then input to the A/D converter 7. Now, since the capacitor 705 of the reference voltage generator 706 holds a voltage of -vr, -A+ (EI
Ve) together - town. Considering this, the non-inverting input terminal (+) of the buffer amplifier 7°709 has (-Vr)+
A voltage of (-EI0) is input. This voltage is then integrated by an integrator 70B via a puffer antenna yo9f. By the way, the capacitor 715 of the A/D converter 7 has already been charged with a voltage of (-vr +V?07) due to the formation of negative feedback roots during the period T1. On the other hand, during the period T, the inverting input terminal (-) of the operational amplifier 707 of the integrator 708 has (Vr)+(1is
o)+vyoy(') voltage is input. Therefore, the output V of operational amplifier 707. is Vo=-[((-E +o)+(-4r)+V7o7
) −((−Vr)+Vyot )′] X AO=−
EloIIAo... River... (7) (where A is the closed roots gain of the operational amplifier 7θ7). That is, a voltage corresponding to the output of the load cell 2 is output.

The integration by this integrator 708 is performed at time 1. ~t.

This is carried out over the T8 period up to. And time t,
The control circuit 713 detects whether the polarity of the input voltage to the buffer amplifier fvoyy is positive or negative, based on the output of the converter f-lator 710, just before the input voltage fvoyy becomes positive or negative. That is, it is detected whether the polarity of the level integrated by the integrator 708 is positive or negative. For example, when the control circuit 713 detects that the output of the integrator 70B has become negative based on the output of the controller 710, the time t occurs.

At the timing of , the controller 8 is commanded to open the first third analog switch 3o21304 and close the eighth analog switch 704. This is as shown in the equivalent circuit in Figure 3.
Indicates that the input pressure is 0♂. On the other hand, the control circuit 713 causes the clock pulse counter 712 to start counting the clock pulses at time t. When the input voltage to the buffer unshift o9 is turned ON, the voltage integrated by the integrator 70B is gradually discharged, and eventually the voltage level becomes zero at time t, and the output level of the comparator 710 becomes zero. Comparator 710 output level is zero K null! : f
e control circuit 713 has its own clock pulse counter 71
2 stops the clock pulse counting operation. Therefore, the clock pulse counter 12 is at time t,
It is useful to count the clock pulses during the T1 period from ~t. By the way, the period T is proportional to the voltage level integrated by the integrator 70B, and the voltage integrated by the integrator 70B is proportional to the output of the load cell 2, so the period T, is determined by the clock pulse counter 712. The number of counts counted over the period of 9 hours represents the load amount measured by the load cell 2 on a daily level basis. Also, for example, the control circuit 71
3 detects that the output of the integrator 708 is positive due to the output of the converter 710, and at time t, the controller 8 opens the first and third analog switches 302 and 304 and switches the fifth The analog switch 101 is commanded to be closed. This means that the input voltage to the buffer amplifier f709 becomes "r)"('/r) as shown in the circuit shown in FIG.

In this case as well, the control circuit 713 at time 1
Start counting clock pulses at m. Input voltage -2Vr to buffer annor 09 and integrator 70B
Since the polarity of the integrated output is opposite to that of the input voltage -2
The voltage integrated by the integrator 708 is gradually discharged by vr, and eventually, at time t, the voltage level becomes zero, and the output level of the controller 710 becomes zero.

In this case as well, the counter 712 indicates times t, ~t, t.
Count the clock pulses during the T8 period at load cell 2.
The amount of load measured by is expressed in terms of day level.

The relationship between time and integrator output when the input voltage from the load cell 2 to the A/D converter 7 is negative and positive is shown in (&) and (b) in Figure 5. .

Output V of integrator 70B during period TtVC. +t'i If the charging voltage of the capacitor 716 at time t is zero, then (8). Also, the output of the integrator 70& during the period T.

, is... (9). And yet ``' YOI, so it becomes.

Because there is... A and V. s VIOf is the counter 71201
When the voltage per count is negligible, it becomes .

By the way, as mentioned above, the A/D used in this device
Since the converter 7 operates with respect to both positive and negative input voltages, for example, when a load of exactly 1/2 of the maximum load Wn, that is, Wn/2, is applied to the load cell 2, A/
'Adjust the potentiometer 902 of the bias circuit 9 so that the input voltage level to the D converter 1 is exactly zero. This can be expressed graphically as shown in FIG. In other words, when the load on load cell 2 is zero, A/
When the input to the D converter 7 is positive at P2 and the load on the load cell 2 is Wn/2, A/I) The input to the converter 7 is zero and the load on the load cell 2 is maximum Wn.
The bias circuit 9 is adjusted so that the input to the converter 7 becomes negative at P. Incidentally, the correction range of the initial load for the μm docel 2 is set to P1 to P, expressed as the input level to the A/'D converter 7. By doing so, the A/b converter 7 can be operated for inputs in the range P, -P, that is, in the positive to negative range. For example, when the A/'D converter 7 is operated unipolar, W
For a load of n, the input voltage to the converter 7 is op,
Since the load cell 2 is limited to the range of op, there is a problem in that a highly sensitive one having a large output with respect to the load cannot be used as the load cell 2. In this regard, the device of the present invention uses a converter 7 that can operate in the range from positive to negative, that is, P1 to P, and the A/D converter 7 is connected to the load cell by using the bias circuit 9. Therefore, a highly sensitive load cell 2 can be used as the load cell 2. Therefore, highly accurate weight measurement can be performed. Moreover, the inputs at the positive and negative poles are 0-P, respectively.

0 to P, so even if a resolution of 60,000 counts is required for the input, a resolution of 30,000 counts is sufficient for each polarity and a relatively inexpensive one can be used. It is highly economical and fully suitable for practical use.

In order to obtain equivalent resolution with this black rate polarity A/D converter, 60,000
A device with zero count resolution is required, and a highly accurate and expensive device is required. Also, in the A/D converter 7, the clock counter 712 first connects the DC amplifier 3 to the time integrator 708 that counts a predetermined number of clock pulses.
The output is integrated, and then the voltage integrated by the integrator 708 starts discharging, and the clock pulse counter 712 is caused to count clock pulses so that the level of the voltage integrated by the integrator 708 becomes zero. The counter 7120 stops the force counting operation at the timing when the clock pulse reaches 100, and a digital weight signal is obtained based on the count number of the counter 712 at that time. Even if the pulse interval may be deviated, the integration time of the integrator 708 in the period T8 changes accordingly, so the count number of the clock i'f pulse of the clock pulse counter 712 in the period T is 9 pulses apart from the clock pulse. It always shows the correct value without being affected by disturbances. Moreover, capacitor 30
8, voltage A1 from bias circuit 9 (VS.+V*)
At the same time, the output of load cell 2 is transferred to operational amplifier 3.
The input to the A/11) converter 7 is changed to A+(E+
Vs), the offset voltage V, of the operational amplifier 301. 1 can be removed, and the input to the A/'D converter 7 can be reliably set to a voltage corresponding to the load.

In FIG. 6, when the load on the load cell 2 is zero, the input to the A//D converter 7 is set to positive P8, but this is not necessarily the case; In this case, when the load on the load cell 2 is maximum Wn, the input of A/ to the converter 7 becomes positive P8, which is just the opposite of the relationship shown in FIG.

As described above, the present invention includes a load cell that outputs a voltage signal in accordance with the load, an A/D converter that outputs a digital load signal in response to the load cell output, and a bias for the output of the load cell. The A/D converter is equipped with an internal reference voltage generator and is operable with inputs of both positive and negative polarities, and the bias circuit is configured to apply a voltage to the load cell. A bias voltage is applied to the output of the load cell so that when approximately half the maximum load is applied, the input level to the A/D converter is just at the peak, allowing for highly accurate weight measurement. Therefore, it is possible to provide a weight measuring device which is capable of carrying out the following tasks, is highly economical, and is fully suitable for practical use.

[Brief explanation of the drawing]

Fig. 1 is a circuit configuration diagram showing an embodiment of the present invention. Fig. 2 is an equivalent circuit diagram of a load cell. Fig. 3 is an equivalent circuit diagram of an integrator input section when the input voltage is negative. The equivalent circuit diagram of the integrator input section when the input voltage is positive. Figure 5 is a graph showing the operating characteristics of the integrator. (a) is the graph when the input voltage is negative, and (b) is the graph when the input voltage is positive. The graph, Figure 6 is ^7
It is a graph which shows the operating characteristic of an equalizer. 1... Reference voltage power supply, 2... Load cell, 3...
- DC amplifier, 7... A/D converter, 706... Reference voltage generator, 708... Integrator, 713... Control circuit, 9... Bias circuit, 902... Potentiometer .

Claims (1)

[Claims] The converter consists of a load cell that outputs a voltage signal according to the load, a converter that outputs a digital load signal in response to the output of the load cell, and a bias circuit that applies a bias voltage to the output of the load cell. The 79477 circuit uses an internal reference voltage generator that can operate with inputs of both positive and negative polarities, and the 79477 circuit performs the above conversion when a load approximately sufficient to the maximum load is applied to the load cell. A weight measuring device characterized in that a bias voltage is applied to the output of the load cell so that the input level to the load cell becomes exactly zero.