JPS58135027U - Mute circuit - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a conventional mute circuit, and FIG. 2 is a circuit diagram of a circuit of the present invention.

Claims (1)

[Scope of utility model registration request] A system controller that independently outputs a play instruction signal and a mute instruction signal in response to an external command signal, an audio signal source, a first input terminal that receives an audio signal from the audio signal source, and amplifies the audio signal. The first amplifier to
A first output terminal for deriving the first amplifier output, a second input terminal for inputting the first amplifier output from the first output terminal, a second amplifier for amplifying the first amplifier output, and the second amplifier. a second output terminal for deriving an output, a third input terminal for inputting the play instruction signal, a fourth input terminal for inputting the mute instruction signal, and when both the play instruction signal and the mute instruction signal are present, the third input terminal 1. 2nd
a mute circuit comprising: an integrated circuit having a mute control circuit that substantially stops deriving an output from an amplifier and substantially stopping deriving an output from the second amplifier when the mute instruction signal is present;