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JPS5784618A - One shot circuit - Google Patents

One shot circuit

Info

Publication number
JPS5784618A
JPS5784618A JP55161682A JP16168280A JPS5784618A JP S5784618 A JPS5784618 A JP S5784618A JP 55161682 A JP55161682 A JP 55161682A JP 16168280 A JP16168280 A JP 16168280A JP S5784618 A JPS5784618 A JP S5784618A
Authority
JP
Japan
Prior art keywords
circuit
signal
level
time constant
shot
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55161682A
Other languages
Japanese (ja)
Inventor
Masatoshi Murakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55161682A priority Critical patent/JPS5784618A/en
Publication of JPS5784618A publication Critical patent/JPS5784618A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/033—Monostable circuits

Abstract

PURPOSE:To simplify the design and to avoid the effect of chattering, by constituting an one-shot circuit with a logical circuit and a time constant circuit. CONSTITUTION:When a step signal (a) is applied to an input terminal 11, output terminals of an OR circuit 12, and AND circuits 13, 19 are at ''1'' level and a time constant circuit 15 is set simultaneously. After a prescribed time T, a ''1'' level signal (b) is outputted, and this signal is applied to an AND circuit 17 via an OR circuit 16. Thus, the input conditions of the AND circuit 17 is satisfied and the output signal is at ''1'' level. Since this signal is inverted with an inverter circuit 18, the output signal of the AND circuit 13 is at ''0'' level to produce one shot waveform (c) having a preset time length T for the time constant circuit 15.
JP55161682A 1980-11-17 1980-11-17 One shot circuit Pending JPS5784618A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55161682A JPS5784618A (en) 1980-11-17 1980-11-17 One shot circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55161682A JPS5784618A (en) 1980-11-17 1980-11-17 One shot circuit

Publications (1)

Publication Number Publication Date
JPS5784618A true JPS5784618A (en) 1982-05-27

Family

ID=15739835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55161682A Pending JPS5784618A (en) 1980-11-17 1980-11-17 One shot circuit

Country Status (1)

Country Link
JP (1) JPS5784618A (en)

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