JPS5776931A - Pll circuit - Google Patents
Pll circuitInfo
- Publication number
- JPS5776931A JPS5776931A JP55152733A JP15273380A JPS5776931A JP S5776931 A JPS5776931 A JP S5776931A JP 55152733 A JP55152733 A JP 55152733A JP 15273380 A JP15273380 A JP 15273380A JP S5776931 A JPS5776931 A JP S5776931A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- control
- output signal
- output
- smoothing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009499 grossing Methods 0.000 abstract 2
- 101100488882 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) YPL080C gene Proteins 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To control an output signal frequency in a wide range with control voltage less in the remaining reference frequency component, by providing a means superimposing mother DC voltage on a DC voltage obtained through smoothing an output signal of a phase comparator. CONSTITUTION:An output of a programmable divider 2 and an output of reference frequency generator 4 are compared with each other at a phase comparator 3, and this comparison output signal is inputted to a low-pass filter 5. Another DC voltage is superimposed on a DC voltage obtained from smoothing with an LPF5 by a DC bias circuit 7 to obtain a control signal of a voltage-controlled oscillator 1. In a bias circuit 7, a plurality of variable resistors VR1-VR3 are connected in parallel with a DC power supply E, and a slider of each variable resistor is selectively connected to the voltage-controlled oscillator 1 via a switch SW, and a control voltage can be obtained by interlocking the switch SW with a program switching operation to the programmable divider 2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55152733A JPS5776931A (en) | 1980-10-30 | 1980-10-30 | Pll circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55152733A JPS5776931A (en) | 1980-10-30 | 1980-10-30 | Pll circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5776931A true JPS5776931A (en) | 1982-05-14 |
Family
ID=15546966
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55152733A Pending JPS5776931A (en) | 1980-10-30 | 1980-10-30 | Pll circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5776931A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0276907A2 (en) * | 1987-01-29 | 1988-08-03 | Ing. C. Olivetti & C., S.p.A. | Circuit for regulating a voltage controlled oscillator |
FR2614482A1 (en) * | 1987-04-24 | 1988-10-28 | Thomson Semiconducteurs | MULTI-REFERENCE FREQUENCY GENERATOR |
EP0896434A1 (en) * | 1997-08-07 | 1999-02-10 | Nec Corporation | Phase locked loop circuit |
WO2002027914A3 (en) * | 2000-09-29 | 2002-07-25 | Broadcom Corp | Multi-frequency band controlled oscillator |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5533554B2 (en) * | 1974-12-27 | 1980-09-01 |
-
1980
- 1980-10-30 JP JP55152733A patent/JPS5776931A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5533554B2 (en) * | 1974-12-27 | 1980-09-01 |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0276907A2 (en) * | 1987-01-29 | 1988-08-03 | Ing. C. Olivetti & C., S.p.A. | Circuit for regulating a voltage controlled oscillator |
FR2614482A1 (en) * | 1987-04-24 | 1988-10-28 | Thomson Semiconducteurs | MULTI-REFERENCE FREQUENCY GENERATOR |
EP0896434A1 (en) * | 1997-08-07 | 1999-02-10 | Nec Corporation | Phase locked loop circuit |
US6084480A (en) * | 1997-08-07 | 2000-07-04 | Nec Corporation | Phase locked loop circuit including voltage controlled oscillator and low pass filter |
WO2002027914A3 (en) * | 2000-09-29 | 2002-07-25 | Broadcom Corp | Multi-frequency band controlled oscillator |
US6650196B2 (en) | 2000-09-29 | 2003-11-18 | Broadcom Corporation | Multi-frequency band controlled oscillator |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0153195B1 (en) | Frequency modulation apparatus employing a phase-locked loop | |
JPS6448267A (en) | Pll circuit for magnetic disk device | |
ES8302385A1 (en) | Phase-locked loop with initialization loop. | |
JPS61258529A (en) | Frequency synthesizer | |
JPS54102814A (en) | Synthesizer receiver | |
US4667169A (en) | Phase-locked loop frequency synthesizer having reduced power consumption | |
JPS6489621A (en) | Frequency synthesizer | |
JPS5776931A (en) | Pll circuit | |
JPS56136037A (en) | Phase synchronizing oscillator | |
JPH03206722A (en) | Voltage control oscillator | |
EP0378190A3 (en) | Digital phase locked loop | |
EP0318114A3 (en) | Frequency synthesizer | |
JPS56158536A (en) | Pil oscillation circuit | |
EP0206247A3 (en) | Pll frequency synthesizer | |
JPS5668004A (en) | Fm modulating circuit | |
DE3685703D1 (en) | CIRCUIT HAVING A DC-FM PHASE CONTROL CIRCUIT. | |
JPS5776930A (en) | Frequency shift signal generating system using pll | |
JPS57112136A (en) | Frequency synthesizer | |
JPS5636225A (en) | Phase comparing circuit | |
JPS56110306A (en) | Voltage control type oscillator for pll frequency synthesizer | |
JPS5738031A (en) | Phase controlling circuit | |
JPS5464956A (en) | Pll circuit | |
JPS5483752A (en) | Pll frequency synthesizer system | |
JPS5732133A (en) | Phase-synchronous oscillator | |
KR960012799B1 (en) | Phase Locked Loop (PLL) Frequency Synthesizer with Fixed Time Acceleration Circuit |