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JPS5735438A - Sampling pulse generating circuit - Google Patents

Sampling pulse generating circuit

Info

Publication number
JPS5735438A
JPS5735438A JP10998380A JP10998380A JPS5735438A JP S5735438 A JPS5735438 A JP S5735438A JP 10998380 A JP10998380 A JP 10998380A JP 10998380 A JP10998380 A JP 10998380A JP S5735438 A JPS5735438 A JP S5735438A
Authority
JP
Japan
Prior art keywords
sampling pulse
circuit
frequency
sampling
304khz
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10998380A
Other languages
Japanese (ja)
Inventor
Atsushi Ogawa
Yoshimasa Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TRIO KENWOOD CORP
Kenwood KK
Original Assignee
TRIO KENWOOD CORP
Kenwood KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TRIO KENWOOD CORP, Kenwood KK filed Critical TRIO KENWOOD CORP
Priority to JP10998380A priority Critical patent/JPS5735438A/en
Publication of JPS5735438A publication Critical patent/JPS5735438A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00—Demodulation of amplitude-modulated oscillations
    • H03D1/22—Homodyne or synchrodyne circuits
    • H03D1/2209—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
    • H03D1/2236—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders using a phase locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To achieve stable sampling pulse, by using a PLL circuit in a stereo demodulation circuit of a sampling hold system and synthesizing a frequency-divided rectangular wave. CONSTITUTION:A terminal 1 is an input terminal for a pilot signal of 19kHz in a composite signal, and a PLL circuit consists of a phase comparator 2, a DC amplifier 3, a voltage controlled oscillator 4 of 608kHz self-running frequency and frequency-division flip-flops 5-9. On the other hand, waveform synthesizing circuits 10 and 11 are composed of OR gates. From the circuit 10, a sampling pulse in 38kHz and having the same pulse width as that (nearly, 1.5musec) of 304kHz for the left channel is obtained. Further, from the circuit 11, the sampling pulse for the right channel which is in 38kHz, different from the phase of the left channel sampling pulse by 180 deg. and has the same pulse width as that of 304kHz, can be obtained.
JP10998380A 1980-08-11 1980-08-11 Sampling pulse generating circuit Pending JPS5735438A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10998380A JPS5735438A (en) 1980-08-11 1980-08-11 Sampling pulse generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10998380A JPS5735438A (en) 1980-08-11 1980-08-11 Sampling pulse generating circuit

Publications (1)

Publication Number Publication Date
JPS5735438A true JPS5735438A (en) 1982-02-26

Family

ID=14524098

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10998380A Pending JPS5735438A (en) 1980-08-11 1980-08-11 Sampling pulse generating circuit

Country Status (1)

Country Link
JP (1) JPS5735438A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6061089A (en) * 1983-09-14 1985-04-08 Jgc Corp Purifying method of condensate
JPS61138588A (en) * 1984-12-10 1986-06-26 Toshiba Corp Device for purifying feed water and condensate in atomic power plant

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6061089A (en) * 1983-09-14 1985-04-08 Jgc Corp Purifying method of condensate
JPS6159794B2 (en) * 1983-09-14 1986-12-18 Nitsuki Kk
JPS61138588A (en) * 1984-12-10 1986-06-26 Toshiba Corp Device for purifying feed water and condensate in atomic power plant

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