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JPS5734375A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS5734375A
JPS5734375A JP10994380A JP10994380A JPS5734375A JP S5734375 A JPS5734375 A JP S5734375A JP 10994380 A JP10994380 A JP 10994380A JP 10994380 A JP10994380 A JP 10994380A JP S5734375 A JPS5734375 A JP S5734375A
Authority
JP
Japan
Prior art keywords
chip
integrated circuit
signal processing
processing circuit
element region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10994380A
Other languages
Japanese (ja)
Other versions
JPS6027196B2 (en
Inventor
Naohiko Kaida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55109943A priority Critical patent/JPS6027196B2/en
Publication of JPS5734375A publication Critical patent/JPS5734375A/en
Publication of JPS6027196B2 publication Critical patent/JPS6027196B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/1443Devices controlled by radiation with at least one potential jump or surface barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To obtain an integrated circuit of high reliability through avoiding incidence of light into a signal processing circuit element region by an arrangement in which a photoelectric conversion element region and a signal processing circuit element region are separated in an integrated circuit containing a photoelectric conversion element inside it and the signal processing circuit element region is fixed in the reverse direction. CONSTITUTION:A photoelectric conversion element chip 1 and a signal processing circuit element chip 2 are separated individually each other and an integrated circuit is built by molding them using transparent resin 5. In this arrangement the chip 1 is fixed on an upper end of a lead frame 3 which protrudes out the resin 5 pointed incident surface upward, and they are connected with a bonding wire 4. And the chip 2 is fixed on the chip 3 by face-down bonding. By this arrangement an incident light to the chip 1 can not get into the chip 2 and it is possible to fabricate an error- free integrated circuit without any special light screening part.
JP55109943A 1980-08-08 1980-08-08 Semiconductor integrated circuit device Expired JPS6027196B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55109943A JPS6027196B2 (en) 1980-08-08 1980-08-08 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55109943A JPS6027196B2 (en) 1980-08-08 1980-08-08 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS5734375A true JPS5734375A (en) 1982-02-24
JPS6027196B2 JPS6027196B2 (en) 1985-06-27

Family

ID=14523039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55109943A Expired JPS6027196B2 (en) 1980-08-08 1980-08-08 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6027196B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6132480A (en) * 1984-07-24 1986-02-15 Canon Inc Photosensor
JPH0444388U (en) * 1990-08-10 1992-04-15
JPH05259483A (en) * 1992-01-14 1993-10-08 Samsung Electron Co Ltd Semiconductor package for photoelectric conversion
US5357121A (en) * 1991-10-14 1994-10-18 Mitsubishi Denki Kabushiki Kaisha Optoelectronic integrated circuit
CN113013288A (en) * 2021-02-05 2021-06-22 广东省大湾区集成电路与系统应用研究院 Integration structure and integration method of detector

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6132480A (en) * 1984-07-24 1986-02-15 Canon Inc Photosensor
JPH0476221B2 (en) * 1984-07-24 1992-12-03 Canon Kk
JPH0444388U (en) * 1990-08-10 1992-04-15
US5357121A (en) * 1991-10-14 1994-10-18 Mitsubishi Denki Kabushiki Kaisha Optoelectronic integrated circuit
JPH05259483A (en) * 1992-01-14 1993-10-08 Samsung Electron Co Ltd Semiconductor package for photoelectric conversion
CN113013288A (en) * 2021-02-05 2021-06-22 广东省大湾区集成电路与系统应用研究院 Integration structure and integration method of detector

Also Published As

Publication number Publication date
JPS6027196B2 (en) 1985-06-27

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