JPS5731280A - Simultaneous display television receiver of colored plural screens - Google Patents
Simultaneous display television receiver of colored plural screensInfo
- Publication number
- JPS5731280A JPS5731280A JP10514980A JP10514980A JPS5731280A JP S5731280 A JPS5731280 A JP S5731280A JP 10514980 A JP10514980 A JP 10514980A JP 10514980 A JP10514980 A JP 10514980A JP S5731280 A JPS5731280 A JP S5731280A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- color difference
- chrominance
- sampling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
- H04N5/45—Picture in picture, e.g. displaying simultaneously another television channel in a region of the screen
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Processing Of Color Television Signals (AREA)
Abstract
PURPOSE:To simplify the constitution and reduce the cost, by sampling the two color difference signals read synchronously with the 1st TV screen with two clock signals having a phase difference according to the phase difference of the two color difference signals and then leading the samped color difference signals to the 2nd screen color difference signal inserting circuit. CONSTITUTION:A sampling circuit 121 of a slave screen generating circuit samples a carrier chrominance signal A via the output signal of a dividing circuit 111' that divides the chrominance subcarrier into 3/4 and then writes it into a chrominance signal memory 414. While a writing clock generating circuit 42a produces a writing clock signal synchronous with both the output signal of the circuit 111' and the synchronous signal of the slave screen. The chrominance signal written into the memory 414 is read in accordance with the signal of a reading clock generating circuit 43a and then applied to sampling circuits 122 and 123. These chrominance signal data are sampled with the output signal of a sampling clock generating circuit 124 to obtain a slave screen chrominance signal. In such way, two color difference signal demodulating circuits can be excluded to simplify the chrominance signal processing circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10514980A JPS5731280A (en) | 1980-08-01 | 1980-08-01 | Simultaneous display television receiver of colored plural screens |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10514980A JPS5731280A (en) | 1980-08-01 | 1980-08-01 | Simultaneous display television receiver of colored plural screens |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5731280A true JPS5731280A (en) | 1982-02-19 |
Family
ID=14399661
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10514980A Pending JPS5731280A (en) | 1980-08-01 | 1980-08-01 | Simultaneous display television receiver of colored plural screens |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5731280A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS648893U (en) * | 1987-07-07 | 1989-01-18 | ||
| EP0371270A2 (en) * | 1988-10-31 | 1990-06-06 | Nec Corporation | Image size reduction circuit for reducing ordinary-sized image into smaller area |
| CN111986610A (en) * | 2020-09-01 | 2020-11-24 | 紫旸升光电科技(苏州)有限公司 | Multi-screen display unit color correction synchronization method |
-
1980
- 1980-08-01 JP JP10514980A patent/JPS5731280A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS648893U (en) * | 1987-07-07 | 1989-01-18 | ||
| EP0371270A2 (en) * | 1988-10-31 | 1990-06-06 | Nec Corporation | Image size reduction circuit for reducing ordinary-sized image into smaller area |
| CN111986610A (en) * | 2020-09-01 | 2020-11-24 | 紫旸升光电科技(苏州)有限公司 | Multi-screen display unit color correction synchronization method |
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