JPS573151A - Test system for 1-chip microcomputer - Google Patents
Test system for 1-chip microcomputerInfo
- Publication number
- JPS573151A JPS573151A JP7648880A JP7648880A JPS573151A JP S573151 A JPS573151 A JP S573151A JP 7648880 A JP7648880 A JP 7648880A JP 7648880 A JP7648880 A JP 7648880A JP S573151 A JPS573151 A JP S573151A
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- test
- output
- terminal
- ram10
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE:To prevent execution of a test instruction from being restricted by the operation speed due to an LSI tester, by executing the instruction code written in a RAM at the execution time of the test instruction. CONSTITUTION:An LSI tester is used to write the instruction code, which is used at the test execution time, into an RAM10 from a terminal 8. The write command to the RAM10 is inputted to a test control terminal 9, and then, an input/output control circuit 13 outputs the signal of the terminal 8 to an internal data bus 7. Further, the signal of the bus 7 is written in the RAM10 through a bit correcting circuit 11 and is reset again. Next, when the execution command is inputted from the terminal 9, the correcting circuit 11 functions to correct the output of the RAM 10 so that this output becomes in the same length as the output bit length of an ROM1. A multiplexer 12 functions to select and input the output of the correcting circuit 11. Consequently, a test instruction L written preliminarily in the RAM 10 is latched in an instruction register 3 and is decoded by an instruction decoder 4, thus executing the test instruction code.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7648880A JPS573151A (en) | 1980-06-05 | 1980-06-05 | Test system for 1-chip microcomputer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7648880A JPS573151A (en) | 1980-06-05 | 1980-06-05 | Test system for 1-chip microcomputer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS573151A true JPS573151A (en) | 1982-01-08 |
Family
ID=13606595
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7648880A Pending JPS573151A (en) | 1980-06-05 | 1980-06-05 | Test system for 1-chip microcomputer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS573151A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5875254A (en) * | 1981-10-28 | 1983-05-06 | Nec Corp | One-chip microcomputer system |
| JPS58168157A (en) * | 1982-03-30 | 1983-10-04 | Fujitsu Ltd | Test circuit of one chip microcomputer |
| US5555139A (en) * | 1986-11-10 | 1996-09-10 | Seagate Technology, Inc. | Dual track servo system with position interpolation |
-
1980
- 1980-06-05 JP JP7648880A patent/JPS573151A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5875254A (en) * | 1981-10-28 | 1983-05-06 | Nec Corp | One-chip microcomputer system |
| JPS6212542B2 (en) * | 1981-10-28 | 1987-03-19 | Nippon Electric Co | |
| JPS58168157A (en) * | 1982-03-30 | 1983-10-04 | Fujitsu Ltd | Test circuit of one chip microcomputer |
| US5555139A (en) * | 1986-11-10 | 1996-09-10 | Seagate Technology, Inc. | Dual track servo system with position interpolation |
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