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JPS57203384A - Extracting circuit of binary data - Google Patents

Extracting circuit of binary data

Info

Publication number
JPS57203384A
JPS57203384A JP8836281A JP8836281A JPS57203384A JP S57203384 A JPS57203384 A JP S57203384A JP 8836281 A JP8836281 A JP 8836281A JP 8836281 A JP8836281 A JP 8836281A JP S57203384 A JPS57203384 A JP S57203384A
Authority
JP
Japan
Prior art keywords
signal
level
supplied
voltage
outputs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8836281A
Other languages
Japanese (ja)
Inventor
Zenji Hattori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP8836281A priority Critical patent/JPS57203384A/en
Publication of JPS57203384A publication Critical patent/JPS57203384A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
    • H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
    • H04N7/0355—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal for discrimination of the binary level of the digital data, e.g. amplitude slicers

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To extract a binary data, by adopting the logic that keeps a high or low level when the ouputs of two comparators are at high or low levels and keeps the preceding state when one of two outputs is at high level and the other is at low level respectively. CONSTITUTION:The output signal SI of a clamping circuit 7 is supplied to the comparators 12A and 12B respectively. The voltage EA obtained from a variable resistor 13A is supplied to the comparator 12A, and the voltage EA is compared with the signal SI to obtain a signal SA. While the voltage EB obtained from a variable resistor 13B is supplied to the comparator 12B, and the voltage EB is compared with the signal SI to obtain a signal SB. The outputs SA and SB are supplied to the set and reset terminals of an SFF14 respectively. Thus an output signal SO is obtained from the FF14. The signal SO is set at H level when the outputs SA and SB are at H level, and set at L level when the SA and SB are at L level and is kept at the preceding state when the SA and SB are at L and H levels respectively. The signal SO is almost coincident with original binary signals of 1, 0.
JP8836281A 1981-06-09 1981-06-09 Extracting circuit of binary data Pending JPS57203384A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8836281A JPS57203384A (en) 1981-06-09 1981-06-09 Extracting circuit of binary data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8836281A JPS57203384A (en) 1981-06-09 1981-06-09 Extracting circuit of binary data

Publications (1)

Publication Number Publication Date
JPS57203384A true JPS57203384A (en) 1982-12-13

Family

ID=13940692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8836281A Pending JPS57203384A (en) 1981-06-09 1981-06-09 Extracting circuit of binary data

Country Status (1)

Country Link
JP (1) JPS57203384A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2731125A1 (en) * 1995-02-28 1996-08-30 Sgs Thomson Microelectronics CIRCUIT FOR PROCESSING AN ASYNCHRONOUS SIGNAL PERIODICALLY PRESENTING SYNCHRONIZATION SALVES

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5199461A (en) * 1975-02-27 1976-09-02 Yokogawa Electric Works Ltd

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5199461A (en) * 1975-02-27 1976-09-02 Yokogawa Electric Works Ltd

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2731125A1 (en) * 1995-02-28 1996-08-30 Sgs Thomson Microelectronics CIRCUIT FOR PROCESSING AN ASYNCHRONOUS SIGNAL PERIODICALLY PRESENTING SYNCHRONIZATION SALVES
EP0730377A1 (en) * 1995-02-28 1996-09-04 STMicroelectronics S.A. Circuit for processing an asynchronous signal containing a periodical synchronisation burst
US5933458A (en) * 1995-02-28 1999-08-03 Stmicroelectronics, S.A. Circuit for processing asynchronous signals having periodic synchronization bursts

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