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JPS57200982A - Storage control system - Google Patents

Storage control system

Info

Publication number
JPS57200982A
JPS57200982A JP56084357A JP8435781A JPS57200982A JP S57200982 A JPS57200982 A JP S57200982A JP 56084357 A JP56084357 A JP 56084357A JP 8435781 A JP8435781 A JP 8435781A JP S57200982 A JPS57200982 A JP S57200982A
Authority
JP
Japan
Prior art keywords
read
data
write
address
output lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56084357A
Other languages
Japanese (ja)
Other versions
JPS6327795B2 (en
Inventor
Kanji Kubo
Tsuguo Momose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56084357A priority Critical patent/JPS57200982A/en
Publication of JPS57200982A publication Critical patent/JPS57200982A/en
Publication of JPS6327795B2 publication Critical patent/JPS6327795B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To eliminate a delay of read-out due to competition, by changing the position of only a part changed by write in a read-out data, to a write data, and setting it as a read-out data, in case when a read-out address has coincided with a write address. CONSTITUTION:Contents of write data lines 26-33 and read-out data lines 45- 52, which have been connected to data part units 1-8 are selected through selecting circuits 18-25, and are outputted to outlines 62-69. On the other hand, a write address 35 is compared with a read-out address 36 by a comparing circuit 9, this result is compared with each write approval data 37-44 by AND circuits 10-17, and when the write address has coincided with the read-out address, output lines 54-61 of the units 1-8 whose wirte has been approved are turned on. Subsequently, when the output lines 54-61 are off and on, the read-out data and the write data are outputted, respectively, to the output lines 62-69. In this way, a delay of read-out of a data due to competition of read- out and write is removed.
JP56084357A 1981-06-03 1981-06-03 Storage control system Granted JPS57200982A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56084357A JPS57200982A (en) 1981-06-03 1981-06-03 Storage control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56084357A JPS57200982A (en) 1981-06-03 1981-06-03 Storage control system

Publications (2)

Publication Number Publication Date
JPS57200982A true JPS57200982A (en) 1982-12-09
JPS6327795B2 JPS6327795B2 (en) 1988-06-06

Family

ID=13828263

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56084357A Granted JPS57200982A (en) 1981-06-03 1981-06-03 Storage control system

Country Status (1)

Country Link
JP (1) JPS57200982A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60160457A (en) * 1984-01-24 1985-08-22 インターナシヨナル コンピユーターズ リミテツド Data memory
DE3931389A1 (en) * 1988-09-21 1990-03-22 Hitachi Ltd DEVICE FOR DETECTING THE OPERAND COINCIDENCE IN A Buffer Storage Controller

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5613573A (en) * 1979-07-11 1981-02-09 Toshiba Corp Memory control system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5613573A (en) * 1979-07-11 1981-02-09 Toshiba Corp Memory control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60160457A (en) * 1984-01-24 1985-08-22 インターナシヨナル コンピユーターズ リミテツド Data memory
DE3931389A1 (en) * 1988-09-21 1990-03-22 Hitachi Ltd DEVICE FOR DETECTING THE OPERAND COINCIDENCE IN A Buffer Storage Controller

Also Published As

Publication number Publication date
JPS6327795B2 (en) 1988-06-06

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