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JPS57190360A - Protecting device for semiconductor - Google Patents

Protecting device for semiconductor

Info

Publication number
JPS57190360A
JPS57190360A JP56075153A JP7515381A JPS57190360A JP S57190360 A JPS57190360 A JP S57190360A JP 56075153 A JP56075153 A JP 56075153A JP 7515381 A JP7515381 A JP 7515381A JP S57190360 A JPS57190360 A JP S57190360A
Authority
JP
Japan
Prior art keywords
pad
circuit
gate
smaller
diodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56075153A
Other languages
Japanese (ja)
Inventor
Masaru Katagiri
Tetsuo Akisawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56075153A priority Critical patent/JPS57190360A/en
Publication of JPS57190360A publication Critical patent/JPS57190360A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Protection Of Static Devices (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To protect P-N junctions from destruction by a method wherein diffused regions are provided between a signal input/output pad and an MOS input/ output circuit gate wherein diffusion depth is smaller from the pad toward the circuit for lowering surge voltages applied to the gate and for properly dispersing current. CONSTITUTION:Diffusion produced resistors R are provided between a signal input pad 1 and the gate of an MOS input/output circuit 2. N<+> type diffused regions 31-33 are formed in a P type semiconductor substrate 4 similar in construction to the circut 2 and the resultant P-N junctions work to establish equivalence for the circuits wherein Zener diodes D1-D3 are paralelly grounded. Capacitors C1-C3 are respectively, parallelly connected with diodes D1-D3. The breakdown voltage of the diodes and the capacitance of the capacitors are both smaller from the pad 1 toward the circuit 2. For this purpose, the diffusion depth in the regions 31-33 is rendered smaller from the pad 1 toward the circuit 2.
JP56075153A 1981-05-19 1981-05-19 Protecting device for semiconductor Pending JPS57190360A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56075153A JPS57190360A (en) 1981-05-19 1981-05-19 Protecting device for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56075153A JPS57190360A (en) 1981-05-19 1981-05-19 Protecting device for semiconductor

Publications (1)

Publication Number Publication Date
JPS57190360A true JPS57190360A (en) 1982-11-22

Family

ID=13567969

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56075153A Pending JPS57190360A (en) 1981-05-19 1981-05-19 Protecting device for semiconductor

Country Status (1)

Country Link
JP (1) JPS57190360A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62122164A (en) * 1985-07-31 1987-06-03 Nec Corp Input-protective circuit
US4720737A (en) * 1983-06-30 1988-01-19 Fujitsu Limited Semiconductor device having a protection circuit with lateral bipolar transistor
US4757363A (en) * 1984-09-14 1988-07-12 Harris Corporation ESD protection network for IGFET circuits with SCR prevention guard rings
US4893159A (en) * 1985-09-25 1990-01-09 Kabushiki Kaisha Toshiba Protected MOS transistor circuit
US4893157A (en) * 1984-08-24 1990-01-09 Hitachi, Ltd. Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4720737A (en) * 1983-06-30 1988-01-19 Fujitsu Limited Semiconductor device having a protection circuit with lateral bipolar transistor
US4893157A (en) * 1984-08-24 1990-01-09 Hitachi, Ltd. Semiconductor device
US4757363A (en) * 1984-09-14 1988-07-12 Harris Corporation ESD protection network for IGFET circuits with SCR prevention guard rings
JPS62122164A (en) * 1985-07-31 1987-06-03 Nec Corp Input-protective circuit
US4893159A (en) * 1985-09-25 1990-01-09 Kabushiki Kaisha Toshiba Protected MOS transistor circuit

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