JPS57189244A - Relational algebra operating device - Google Patents
Relational algebra operating deviceInfo
- Publication number
- JPS57189244A JPS57189244A JP56074558A JP7455881A JPS57189244A JP S57189244 A JPS57189244 A JP S57189244A JP 56074558 A JP56074558 A JP 56074558A JP 7455881 A JP7455881 A JP 7455881A JP S57189244 A JPS57189244 A JP S57189244A
- Authority
- JP
- Japan
- Prior art keywords
- data
- sort
- processing
- memory
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/20—Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
- G06F16/28—Databases characterised by their database models, e.g. relational or object models
- G06F16/284—Relational databases
Landscapes
- Engineering & Computer Science (AREA)
- Databases & Information Systems (AREA)
- Theoretical Computer Science (AREA)
- Data Mining & Analysis (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Complex Calculations (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Abstract
PURPOSE:To efficiently make sort processing for a large capacity data in high speed, by making a processing element constituted of a processor by which an input data is sort processed through the use of two buffer memories and a memory having FIFO function. CONSTITUTION:Processing elements PE1-PEn coupled in n-stages of cascade consists of a processor Pk sort-processing by using two buffer memories Mk1 and Mk3 (where; k=1-n) and a memory Bk2 having FIFO function. The memory Bk2 can access readout and write of data at the same time, and data are read out in the order of sequence of data for FIFO function. The data are alternately written in memories Mk1, Bk2, Mk3, Bk2, Mk1, Bk2... in parallel, the processor Pk compares data written in two memories, reads out them according to a prescribed sort rule and outputs the result to the next stage. A control processor CP controls the sort processing of the sort engine consisting of the elements PE1-PEn and writes an output via a common bus to an output buffer memory OB.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56074558A JPS57189244A (en) | 1981-05-18 | 1981-05-18 | Relational algebra operating device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56074558A JPS57189244A (en) | 1981-05-18 | 1981-05-18 | Relational algebra operating device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57189244A true JPS57189244A (en) | 1982-11-20 |
Family
ID=13550673
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56074558A Pending JPS57189244A (en) | 1981-05-18 | 1981-05-18 | Relational algebra operating device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57189244A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60176143A (en) * | 1983-12-05 | 1985-09-10 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Program calling apparatus |
| JPS6116326A (en) * | 1984-07-03 | 1986-01-24 | Agency Of Ind Science & Technol | Sort processor |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5063855A (en) * | 1973-10-08 | 1975-05-30 |
-
1981
- 1981-05-18 JP JP56074558A patent/JPS57189244A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5063855A (en) * | 1973-10-08 | 1975-05-30 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60176143A (en) * | 1983-12-05 | 1985-09-10 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Program calling apparatus |
| JPS6116326A (en) * | 1984-07-03 | 1986-01-24 | Agency Of Ind Science & Technol | Sort processor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4591981A (en) | Multimicroprocessor system | |
| ES458224A1 (en) | Input/output interface logic for concurrent operations | |
| US4056847A (en) | Priority vector interrupt system | |
| US4731737A (en) | High speed intelligent distributed control memory system | |
| JPS57189244A (en) | Relational algebra operating device | |
| JPS55115121A (en) | Input and output control unit possible for duplicated recording | |
| JPS6142031A (en) | Sorting processor | |
| EP0012242A1 (en) | Digital data processor for word and character oriented processing | |
| JPS57130150A (en) | Register control system | |
| JPS6464073A (en) | Image memory | |
| SU1488802A1 (en) | Device for associative loading of data vector of variable format | |
| SU1575196A1 (en) | Multiprocessor system with conveyer architecture | |
| JPS641073A (en) | Parallel processing system for image data | |
| JPS5824942A (en) | Data bus | |
| SU486316A1 (en) | Data sorting device | |
| SU951315A1 (en) | Device for interfacing processor with multi-unit memory | |
| Huttenhoff et al. | Arithmetic unit of a computing element in a global, highly parallel computer | |
| SU1013943A1 (en) | Homogenous medium cell | |
| JPS56145428A (en) | Data retrieval device | |
| JPS57189248A (en) | Relational algebra operating device | |
| GB1486311A (en) | High speed digital information storage | |
| SU720510A1 (en) | Associative memory | |
| SU1737454A1 (en) | Device for storing route of interprocessor exchanges in multiprocessor systems | |
| JPS56114026A (en) | Data processor | |
| JPS5528132A (en) | Unit constitution and processing system |