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JPS57179998A - Memory device having redundancy - Google Patents

Memory device having redundancy

Info

Publication number
JPS57179998A
JPS57179998A JP6300581A JP6300581A JPS57179998A JP S57179998 A JPS57179998 A JP S57179998A JP 6300581 A JP6300581 A JP 6300581A JP 6300581 A JP6300581 A JP 6300581A JP S57179998 A JPS57179998 A JP S57179998A
Authority
JP
Japan
Prior art keywords
address
memory cell
circuit
gate
sense circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6300581A
Other languages
Japanese (ja)
Inventor
Shinji Saito
Junichi Miyamoto
Taaki Ichise
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6300581A priority Critical patent/JPS57179998A/en
Priority to US06/370,914 priority patent/US4489402A/en
Priority to DE19823215121 priority patent/DE3215121A1/en
Publication of JPS57179998A publication Critical patent/JPS57179998A/en
Pending legal-status Critical Current

Links

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE: To relieve defects with a simple redundant circuit, by providing one auxiliary memory cell to one defective bit of a main body memory cell, decoding the both at the same time and selecting output information through a gate.
CONSTITUTION: A row direction address signal AR is decoded at 11, a column address signal AC is also decoded at 12, a specified address of a main body memory cell group 13 is designated, storage information is accessed with a specified address and detected at a sense circuit 17. Further, row and column decoders 14 and 15 decode the address signals AR and AC when a defective bit of the group 13 is selected, the address is designated to an auxiliary memory cell group 16, the storage information is accessed from the specified address and detected at a sense circuit 18. The storage information of both the sense circuits 17 and 18 is given to a gate circuit 19, and when the cell group 13 is normal, the information in the sense circuit 17 is outputted and if failed, an AND gate 20 outputs a signal H and the sense circuit 18 is selected, allowing to relieve defects with a simple redundant circuit.
COPYRIGHT: (C)1982,JPO&Japio
JP6300581A 1981-04-25 1981-04-25 Memory device having redundancy Pending JPS57179998A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP6300581A JPS57179998A (en) 1981-04-25 1981-04-25 Memory device having redundancy
US06/370,914 US4489402A (en) 1981-04-25 1982-04-22 Semiconductor memory device
DE19823215121 DE3215121A1 (en) 1981-04-25 1982-04-23 SEMICONDUCTOR STORAGE DEVICE

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6300581A JPS57179998A (en) 1981-04-25 1981-04-25 Memory device having redundancy

Publications (1)

Publication Number Publication Date
JPS57179998A true JPS57179998A (en) 1982-11-05

Family

ID=13216765

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6300581A Pending JPS57179998A (en) 1981-04-25 1981-04-25 Memory device having redundancy

Country Status (1)

Country Link
JP (1) JPS57179998A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6254900A (en) * 1985-04-26 1987-03-10 エステーミクロエレクトロニクス ソシエテ アノニム Programmable read only memory
JPH01133298A (en) * 1987-08-31 1989-05-25 Hitachi Ltd Semiconductor memory device
JPH01236499A (en) * 1988-03-16 1989-09-21 Hitachi Ltd Semiconductor memory device
JPH01285098A (en) * 1988-05-11 1989-11-16 Nec Corp Semiconductor memory device
JPH0221500A (en) * 1988-07-08 1990-01-24 Hitachi Ltd Semiconductor memory with redundancy circuit for relieving defect
JPH0316099A (en) * 1988-03-18 1991-01-24 Toshiba Corp Mask rom

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6254900A (en) * 1985-04-26 1987-03-10 エステーミクロエレクトロニクス ソシエテ アノニム Programmable read only memory
JPH01133298A (en) * 1987-08-31 1989-05-25 Hitachi Ltd Semiconductor memory device
JPH01236499A (en) * 1988-03-16 1989-09-21 Hitachi Ltd Semiconductor memory device
JPH0316099A (en) * 1988-03-18 1991-01-24 Toshiba Corp Mask rom
JPH01285098A (en) * 1988-05-11 1989-11-16 Nec Corp Semiconductor memory device
JPH0221500A (en) * 1988-07-08 1990-01-24 Hitachi Ltd Semiconductor memory with redundancy circuit for relieving defect

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