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JPS5715299A - Memory access control system of doubled memory - Google Patents

Memory access control system of doubled memory

Info

Publication number
JPS5715299A
JPS5715299A JP9037580A JP9037580A JPS5715299A JP S5715299 A JPS5715299 A JP S5715299A JP 9037580 A JP9037580 A JP 9037580A JP 9037580 A JP9037580 A JP 9037580A JP S5715299 A JPS5715299 A JP S5715299A
Authority
JP
Japan
Prior art keywords
memory access
memory
power source
circuit
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9037580A
Other languages
Japanese (ja)
Other versions
JPS6116101B2 (en
Inventor
Teruaki Takegawa
Akihiko Suzuki
Kenichi Naka
Joichi Futaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panafacom Ltd
Original Assignee
Panafacom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panafacom Ltd filed Critical Panafacom Ltd
Priority to JP9037580A priority Critical patent/JPS5715299A/en
Publication of JPS5715299A publication Critical patent/JPS5715299A/en
Publication of JPS6116101B2 publication Critical patent/JPS6116101B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Stand-By Power Supply Arrangements (AREA)
  • Power Sources (AREA)

Abstract

PURPOSE:To improve the maintenance and availability of a momory system while securing the continuation of the processing of the system by providing a specific memory access selective synchronism control circuit, etc. CONSTITUTION:Memory devices 7 and 8 are each provided with a circuit which sends a power fault signal indicating the break or fault of its system power source to the other system memory device, a memory access request selecting circuit which selects memory access requests from CPUs, and a memory access selective synchronism control circuit which sends discrimination information on a CPU selected by the said circuit to the other system and also controls memory access to its system memory on the basis of pieces of CPU discrimination information of its system and the other system and the power source fault signal from the other system. If the power source of the other system is troubled and in a prescribed periode after the power source of the other system is returned to a normal state, the memory access is enabled without reference to the CPU discrimination information from the other system.
JP9037580A 1980-07-02 1980-07-02 Memory access control system of doubled memory Granted JPS5715299A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9037580A JPS5715299A (en) 1980-07-02 1980-07-02 Memory access control system of doubled memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9037580A JPS5715299A (en) 1980-07-02 1980-07-02 Memory access control system of doubled memory

Publications (2)

Publication Number Publication Date
JPS5715299A true JPS5715299A (en) 1982-01-26
JPS6116101B2 JPS6116101B2 (en) 1986-04-28

Family

ID=13996814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9037580A Granted JPS5715299A (en) 1980-07-02 1980-07-02 Memory access control system of doubled memory

Country Status (1)

Country Link
JP (1) JPS5715299A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5708047A (en) * 1992-01-24 1998-01-13 Revlon Consumer Products Corporation Decorating method and products

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB100768A (en) * 1916-04-03 1916-07-06 John Maxfield Improvements in and relating to Tuning Pins for Pianos.
JPS4912626U (en) * 1972-05-10 1974-02-02
JPS5164232A (en) * 1974-07-09 1976-06-03 Deiiteru Adomaito Haintsu Jidoberutomakiagekyojisochi

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB100768A (en) * 1916-04-03 1916-07-06 John Maxfield Improvements in and relating to Tuning Pins for Pianos.
JPS4912626U (en) * 1972-05-10 1974-02-02
JPS5164232A (en) * 1974-07-09 1976-06-03 Deiiteru Adomaito Haintsu Jidoberutomakiagekyojisochi

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5708047A (en) * 1992-01-24 1998-01-13 Revlon Consumer Products Corporation Decorating method and products

Also Published As

Publication number Publication date
JPS6116101B2 (en) 1986-04-28

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