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JPS57130468A - Insulating gate protecting semiconductor device - Google Patents

Insulating gate protecting semiconductor device

Info

Publication number
JPS57130468A
JPS57130468A JP56015741A JP1574181A JPS57130468A JP S57130468 A JPS57130468 A JP S57130468A JP 56015741 A JP56015741 A JP 56015741A JP 1574181 A JP1574181 A JP 1574181A JP S57130468 A JPS57130468 A JP S57130468A
Authority
JP
Japan
Prior art keywords
region
layer
electrode
gate
fetd1
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56015741A
Other languages
Japanese (ja)
Other versions
JPS6234155B2 (en
Inventor
Isao Yoshida
Takeaki Okabe
Mineo Katsueda
Minoru Nagata
Manabu Matsuzawa
Hideshi Ito
Kazutoshi Ashikawa
Hideaki Kato
Mitsuo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56015741A priority Critical patent/JPS57130468A/en
Publication of JPS57130468A publication Critical patent/JPS57130468A/en
Publication of JPS6234155B2 publication Critical patent/JPS6234155B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Amplifiers (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Protection Of Static Devices (AREA)

Abstract

PURPOSE:To protect a vertical type MOSFET effectively by forming a semiconductor layer in a shape that holds a channel layer by high impurity concentration regions onto the insulating film of a substrate region connected to a base region and connecting each high concentration region to a gate and a base. CONSTITUTION:A P region 12 connected to a base region 12' is shaped to the substrate 1 to which the vertical type FETQ1 is formed, and the non-doped or low concentration poly Si layer 4 is molded through a gate insulating film 2 with approximately 130nm thickness. The high impurity concentration regions 5, 6 are shaped to the both side sections of the layer 4 through the injection process of a source region 11, electrodes 7, 8 are formed, and an FETD1 using the region 12 as the gate and the layer 4 as the channel is shaped. The electrode 8 of the FETD1 is connected to an electrode such as a gate electrode 9 of the FETQ1, the electrode 7 is connected to a base contact 71, and the protective element of the FETQ1 is formed. Accordingly, the electrostatic breqkdown of the vertical type FET can be prevented without generating a thyristor effect. The application of various deformation is enabled as protective structure by the FETD1.
JP56015741A 1981-02-06 1981-02-06 Insulating gate protecting semiconductor device Granted JPS57130468A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56015741A JPS57130468A (en) 1981-02-06 1981-02-06 Insulating gate protecting semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56015741A JPS57130468A (en) 1981-02-06 1981-02-06 Insulating gate protecting semiconductor device

Publications (2)

Publication Number Publication Date
JPS57130468A true JPS57130468A (en) 1982-08-12
JPS6234155B2 JPS6234155B2 (en) 1987-07-24

Family

ID=11897180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56015741A Granted JPS57130468A (en) 1981-02-06 1981-02-06 Insulating gate protecting semiconductor device

Country Status (1)

Country Link
JP (1) JPS57130468A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4710791A (en) * 1984-08-09 1987-12-01 Fujitsu Limited Protection device in an integrated circuit
JPS63213370A (en) * 1987-02-28 1988-09-06 Nippon Denso Co Ltd Protective circuit for power transistor
JPS63229757A (en) * 1987-03-19 1988-09-26 Nippon Denso Co Ltd Semiconductor device
JPH02128475A (en) * 1988-11-08 1990-05-16 Nec Corp Field effect transistor
JPH0312970A (en) * 1989-06-12 1991-01-21 Hitachi Ltd Semiconductor device
US5248892A (en) * 1989-03-13 1993-09-28 U.S. Philips Corporation Semiconductor device provided with a protection circuit
US5389811A (en) * 1994-04-14 1995-02-14 Analog Devices, Incorporated Fault-protected overvoltage switch employing isolated transistor tubs
US5436483A (en) * 1983-12-26 1995-07-25 Hitachi, Ltd. Semiconductor integrated circuit device having a first MISFET of an output buffer circuit and a second MISFET of an internal circuit
US5610089A (en) * 1983-12-26 1997-03-11 Hitachi, Ltd. Method of fabrication of semiconductor integrated circuit device
JP2009245985A (en) * 2008-03-28 2009-10-22 Sanken Electric Co Ltd Semiconductor device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5436483A (en) * 1983-12-26 1995-07-25 Hitachi, Ltd. Semiconductor integrated circuit device having a first MISFET of an output buffer circuit and a second MISFET of an internal circuit
US5436484A (en) * 1983-12-26 1995-07-25 Hitachi, Ltd. Semiconductor integrated circuit device having input protective elements and internal circuits
US5610089A (en) * 1983-12-26 1997-03-11 Hitachi, Ltd. Method of fabrication of semiconductor integrated circuit device
US4710791A (en) * 1984-08-09 1987-12-01 Fujitsu Limited Protection device in an integrated circuit
JPS63213370A (en) * 1987-02-28 1988-09-06 Nippon Denso Co Ltd Protective circuit for power transistor
JPS63229757A (en) * 1987-03-19 1988-09-26 Nippon Denso Co Ltd Semiconductor device
JPH02128475A (en) * 1988-11-08 1990-05-16 Nec Corp Field effect transistor
US5248892A (en) * 1989-03-13 1993-09-28 U.S. Philips Corporation Semiconductor device provided with a protection circuit
JPH0312970A (en) * 1989-06-12 1991-01-21 Hitachi Ltd Semiconductor device
US5389811A (en) * 1994-04-14 1995-02-14 Analog Devices, Incorporated Fault-protected overvoltage switch employing isolated transistor tubs
JP2009245985A (en) * 2008-03-28 2009-10-22 Sanken Electric Co Ltd Semiconductor device

Also Published As

Publication number Publication date
JPS6234155B2 (en) 1987-07-24

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