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JPS57106951A - Digital comparing circuit - Google Patents

Digital comparing circuit

Info

Publication number
JPS57106951A
JPS57106951A JP18303080A JP18303080A JPS57106951A JP S57106951 A JPS57106951 A JP S57106951A JP 18303080 A JP18303080 A JP 18303080A JP 18303080 A JP18303080 A JP 18303080A JP S57106951 A JPS57106951 A JP S57106951A
Authority
JP
Japan
Prior art keywords
binary counter
read
comparing circuit
stopped
counting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18303080A
Other languages
Japanese (ja)
Other versions
JPS6238737B2 (en
Inventor
Seiji Yamaguchi
Tatsuo Wada
Masaru Hashirano
Yutaka Oota
Toshiomi Yabu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP18303080A priority Critical patent/JPS57106951A/en
Publication of JPS57106951A publication Critical patent/JPS57106951A/en
Publication of JPS6238737B2 publication Critical patent/JPS6238737B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Measuring Frequencies, Analyzing Spectra (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To improve reliability by preventing an erroneous read during carry operation, by stopping the counting operation of a binary counter when storing operation is performed by a read-in pulse signal, by a comparing circuit consisting of the binary counter and a latch circuit. CONSTITUTION:When the value count of a binary counter 2 is transferred to a latch circuit 3, the inputting of a clock pulse (f) to the binary counter 2 is stopped by a clock pulse control signal (e) at read-in timing, and the counting operation of the binary counter 2 is stopped, so reading operation during a transident counting period is not performed. Therefore, erroneous count contents are never read.
JP18303080A 1980-12-23 1980-12-23 Digital comparing circuit Granted JPS57106951A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18303080A JPS57106951A (en) 1980-12-23 1980-12-23 Digital comparing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18303080A JPS57106951A (en) 1980-12-23 1980-12-23 Digital comparing circuit

Publications (2)

Publication Number Publication Date
JPS57106951A true JPS57106951A (en) 1982-07-03
JPS6238737B2 JPS6238737B2 (en) 1987-08-19

Family

ID=16128504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18303080A Granted JPS57106951A (en) 1980-12-23 1980-12-23 Digital comparing circuit

Country Status (1)

Country Link
JP (1) JPS57106951A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63151203A (en) * 1986-12-16 1988-06-23 Matsushita Electric Ind Co Ltd Digital fm demodulator
JP2007166624A (en) * 2005-12-14 2007-06-28 Samsung Electronics Co Ltd Counter capable of holding and outputting count value, and phase locked loop having the counter

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS492451A (en) * 1972-03-10 1974-01-10
JPS5739149U (en) * 1980-08-14 1982-03-02

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5470457A (en) * 1977-11-07 1979-06-06 Takeda Chemical Industries Ltd Preservation of fresheness of fruit and vegetables

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS492451A (en) * 1972-03-10 1974-01-10
JPS5739149U (en) * 1980-08-14 1982-03-02

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63151203A (en) * 1986-12-16 1988-06-23 Matsushita Electric Ind Co Ltd Digital fm demodulator
JP2007166624A (en) * 2005-12-14 2007-06-28 Samsung Electronics Co Ltd Counter capable of holding and outputting count value, and phase locked loop having the counter

Also Published As

Publication number Publication date
JPS6238737B2 (en) 1987-08-19

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