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JPS5651875A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS5651875A
JPS5651875A JP12728979A JP12728979A JPS5651875A JP S5651875 A JPS5651875 A JP S5651875A JP 12728979 A JP12728979 A JP 12728979A JP 12728979 A JP12728979 A JP 12728979A JP S5651875 A JPS5651875 A JP S5651875A
Authority
JP
Japan
Prior art keywords
decorder
cell
potential
dummy
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12728979A
Other languages
Japanese (ja)
Inventor
Masashi Wada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12728979A priority Critical patent/JPS5651875A/en
Publication of JPS5651875A publication Critical patent/JPS5651875A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To reduce the time requiring for writing by compensating a potential change in an insulating gate composing of a memory device by varying control gate potential wherein an injection current is always maintained at its maximum and a constant charge is injected. CONSTITUTION:Main equipment, a matrix 11 serving as a memory device is provided with a Y decorder 12 and an X decorder 13. In addition to the above, a dummy decorder 14 corresponding to one bit and a dummy cell 15 and a potential control circuit 16 are provided. In this case, the dummy cell 15 has the same size as for a cell in the main equipment, matrix 11 and no insulating gate is provided. In this composition, when writing is applied, a cell channel current and the dummy cell 15 channel current selected from the Y decorder 12 and the dummy decorder 14 are compared by taking out potential to be monitored. And the potential of the X decorder 13 which is control potential for the selected cell is controlled by using the circuit 16 to decide the pontential for maximum injection current to the cell. In this way, the time required for writing is reduce.
JP12728979A 1979-10-04 1979-10-04 Semiconductor memory device Pending JPS5651875A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12728979A JPS5651875A (en) 1979-10-04 1979-10-04 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12728979A JPS5651875A (en) 1979-10-04 1979-10-04 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS5651875A true JPS5651875A (en) 1981-05-09

Family

ID=14956275

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12728979A Pending JPS5651875A (en) 1979-10-04 1979-10-04 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS5651875A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61258394A (en) * 1985-05-10 1986-11-15 Seiko Instr & Electronics Ltd Semiconductor integrated circuit device
JPH01192092A (en) * 1988-01-28 1989-08-02 Toshiba Corp Electrically erasable non-volatile semiconductor memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61258394A (en) * 1985-05-10 1986-11-15 Seiko Instr & Electronics Ltd Semiconductor integrated circuit device
JPH01192092A (en) * 1988-01-28 1989-08-02 Toshiba Corp Electrically erasable non-volatile semiconductor memory

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