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JPS5637735A - Frequency synchronous circuit - Google Patents

Frequency synchronous circuit

Info

Publication number
JPS5637735A
JPS5637735A JP11335879A JP11335879A JPS5637735A JP S5637735 A JPS5637735 A JP S5637735A JP 11335879 A JP11335879 A JP 11335879A JP 11335879 A JP11335879 A JP 11335879A JP S5637735 A JPS5637735 A JP S5637735A
Authority
JP
Japan
Prior art keywords
signal
counter
input
frequency
vco10
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11335879A
Other languages
Japanese (ja)
Inventor
Osamu Ichiyoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11335879A priority Critical patent/JPS5637735A/en
Publication of JPS5637735A publication Critical patent/JPS5637735A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To realize not only the simplification of the circuit but an assured operation, by connecting the input and output signals directly to the up- and down-input terminals each of the updown counter. CONSTITUTION:The input signal (a) and the output signal 2 are connected directly to the up- and down-input terminals U and D each of the updown counter 8. And the contents (c) and (c') of the counter 8 receive the D/A conversion 9, and the analog output is connected to the control input of the voltage control oscillator VCO10. At the same time, the output of the VCO10 is utilized as the signal 2. In this case, if the frequency of the signal (a) supplied to the terminal U of the counter 8 is higher than that of the signal (b) supplied to the terminal D, the count contents (c) of the counter 8 increase gradually. While the count contents (c') decrease gradually vice versa respectively. Accordingly, the DC voltage applied to the control input of the VCO10 is increased or decreased. And control is always given to secure the following of the frequency of the signal 2 to the frequency of the signal (a).
JP11335879A 1979-09-04 1979-09-04 Frequency synchronous circuit Pending JPS5637735A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11335879A JPS5637735A (en) 1979-09-04 1979-09-04 Frequency synchronous circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11335879A JPS5637735A (en) 1979-09-04 1979-09-04 Frequency synchronous circuit

Publications (1)

Publication Number Publication Date
JPS5637735A true JPS5637735A (en) 1981-04-11

Family

ID=14610246

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11335879A Pending JPS5637735A (en) 1979-09-04 1979-09-04 Frequency synchronous circuit

Country Status (1)

Country Link
JP (1) JPS5637735A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4115850Y1 (en) * 1964-01-20 1966-07-25
JPS51105260A (en) * 1974-12-19 1976-09-17 Inst Fuyuru Naharihitentekunik

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4115850Y1 (en) * 1964-01-20 1966-07-25
JPS51105260A (en) * 1974-12-19 1976-09-17 Inst Fuyuru Naharihitentekunik

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