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JPS561598A - Method of fabricating multilayer wiring circuit board - Google Patents

Method of fabricating multilayer wiring circuit board

Info

Publication number
JPS561598A
JPS561598A JP7635879A JP7635879A JPS561598A JP S561598 A JPS561598 A JP S561598A JP 7635879 A JP7635879 A JP 7635879A JP 7635879 A JP7635879 A JP 7635879A JP S561598 A JPS561598 A JP S561598A
Authority
JP
Japan
Prior art keywords
circuit board
multilayer wiring
wiring circuit
fabricating multilayer
fabricating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7635879A
Other languages
Japanese (ja)
Inventor
Youichi Matsuda
Motoyo Wajima
Kanji Murakami
Mineo Kawamoto
Yasusada Morishita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7635879A priority Critical patent/JPS561598A/en
Publication of JPS561598A publication Critical patent/JPS561598A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP7635879A 1979-06-19 1979-06-19 Method of fabricating multilayer wiring circuit board Pending JPS561598A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7635879A JPS561598A (en) 1979-06-19 1979-06-19 Method of fabricating multilayer wiring circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7635879A JPS561598A (en) 1979-06-19 1979-06-19 Method of fabricating multilayer wiring circuit board

Publications (1)

Publication Number Publication Date
JPS561598A true JPS561598A (en) 1981-01-09

Family

ID=13603126

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7635879A Pending JPS561598A (en) 1979-06-19 1979-06-19 Method of fabricating multilayer wiring circuit board

Country Status (1)

Country Link
JP (1) JPS561598A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5840402A (en) * 1994-06-24 1998-11-24 Sheldahl, Inc. Metallized laminate material having ordered distribution of conductive through holes

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS518562A (en) * 1974-07-10 1976-01-23 Matsushita Electric Ind Co Ltd Insatsuhaisenbanno seizohoho
JPS5164512A (en) * 1974-12-02 1976-06-04 Fujitsu Ltd TASOSERAMITSUKUPURINTOBANNOSEIZOHOHO

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS518562A (en) * 1974-07-10 1976-01-23 Matsushita Electric Ind Co Ltd Insatsuhaisenbanno seizohoho
JPS5164512A (en) * 1974-12-02 1976-06-04 Fujitsu Ltd TASOSERAMITSUKUPURINTOBANNOSEIZOHOHO

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5840402A (en) * 1994-06-24 1998-11-24 Sheldahl, Inc. Metallized laminate material having ordered distribution of conductive through holes

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