JPS56147536A - Double error corrector for digital signal reproducing device - Google Patents
Double error corrector for digital signal reproducing deviceInfo
- Publication number
- JPS56147536A JPS56147536A JP5141380A JP5141380A JPS56147536A JP S56147536 A JPS56147536 A JP S56147536A JP 5141380 A JP5141380 A JP 5141380A JP 5141380 A JP5141380 A JP 5141380A JP S56147536 A JPS56147536 A JP S56147536A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- vector
- output
- mkd
- equation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Error Detection And Correction (AREA)
Abstract
PURPOSE:To simplify the circuit constitution, by correcting two vector errors with each element of the correction matrix less in number when they are indicated in one block and writing the corrected information vector to the original address. CONSTITUTION:When vector columns W1-Wn, P, Q are inputted from the terminal 1, S1'(=Wi+Wj) is calculated with the circuit 26 and equation I is calculated with the circuit 28. The output of both the circuits is added at the circuit 30 to be stored as SO of equation II. Next, the output of the gate circuit 31 is taken as O vector for all (m) dimensions, one Mkd is outputted from the memory device 33 for n-1 kinds of correcting operation row matrixes Mkd correspondingly to the value of i, j. The inner product operating circuit 35 makes inner product operation with Mkd and the column vector inputted from the multiplication circuit 32, makes linear conversion and obtains serial output. After this output is in series-parallel conversion, the inverse linear conversion is made at the circuit 37. The result is supplied to the addition circuits 30 and 38, and added to S1' and written in the original address via the tristate circuit 39.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5141380A JPS56147536A (en) | 1980-04-18 | 1980-04-18 | Double error corrector for digital signal reproducing device |
| GB8111843A GB2075227B (en) | 1980-04-14 | 1981-04-14 | Double error correcting system in digital signal reproducing apparatus |
| US06/254,053 US4416010A (en) | 1980-04-14 | 1981-04-14 | Double error correcting system in digital signal reproducing apparatus |
| DE3115054A DE3115054A1 (en) | 1980-04-14 | 1981-04-14 | DOUBLE ERROR CORRECTION ARRANGEMENT IN A DIGITAL SIGNAL PLAYER |
| NL8101834A NL8101834A (en) | 1980-04-14 | 1981-04-14 | CORRECTION SYSTEM FOR A DOUBLE ERROR. |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5141380A JPS56147536A (en) | 1980-04-18 | 1980-04-18 | Double error corrector for digital signal reproducing device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56147536A true JPS56147536A (en) | 1981-11-16 |
| JPS6221448B2 JPS6221448B2 (en) | 1987-05-13 |
Family
ID=12886234
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5141380A Granted JPS56147536A (en) | 1980-04-14 | 1980-04-18 | Double error corrector for digital signal reproducing device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56147536A (en) |
-
1980
- 1980-04-18 JP JP5141380A patent/JPS56147536A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6221448B2 (en) | 1987-05-13 |
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