JPS5568674A - Fabrication of charge coupled device - Google Patents
Fabrication of charge coupled deviceInfo
- Publication number
- JPS5568674A JPS5568674A JP14309178A JP14309178A JPS5568674A JP S5568674 A JPS5568674 A JP S5568674A JP 14309178 A JP14309178 A JP 14309178A JP 14309178 A JP14309178 A JP 14309178A JP S5568674 A JPS5568674 A JP S5568674A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- film
- pattern
- coated
- eaves
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000010408 film Substances 0.000 abstract 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 1
- 229910052782 aluminium Inorganic materials 0.000 abstract 1
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 230000007547 defect Effects 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 238000005286 illumination Methods 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 239000010409 thin film Substances 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Drying Of Semiconductors (AREA)
Abstract
PURPOSE:To obtain electrode train of infinitesimal interval in a charge coupled device by providing a resist pattern having eaves, on a conductivity layer becoming electrodes when forming the electrodes of the charge coupled device and exposing and etching the conductivity layer under the eaves when coating metallic thin film on the entire surface thereof. CONSTITUTION:A gate SiO2 film 2 is coated on a silicon substrate 1, a polycrystalline silicon conductivity layer 10 is vapor grown thereon, and a positive resist film 11 is coated thereon. Then, light is exposed on the film 11 in sufficient exposure time and illumination thereof by using a photomask having a minimum pattern width formed possibly, the film 11 is then developed to thereby form a resist pattern 11' having a pattern width of approx. 3mum and eaves 12 of approx. 2,000Angstrom is formed at the periphery thereof. When an aluminum thin layer 13 is then coated on the entire surface, the pattern 11' is separated from the layer 10 so that the layer is not coated underneath the defects 12. Accordingly, it is plasma etched to thereby remove the eaves portion of the layer 10 to thus retain the layer 10 as electrode train but to remove the pattern 11'.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53143091A JPS6057229B2 (en) | 1978-11-20 | 1978-11-20 | Method of manufacturing a charge-coupled device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53143091A JPS6057229B2 (en) | 1978-11-20 | 1978-11-20 | Method of manufacturing a charge-coupled device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5568674A true JPS5568674A (en) | 1980-05-23 |
| JPS6057229B2 JPS6057229B2 (en) | 1985-12-13 |
Family
ID=15330694
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53143091A Expired JPS6057229B2 (en) | 1978-11-20 | 1978-11-20 | Method of manufacturing a charge-coupled device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6057229B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5750465A (en) * | 1980-09-11 | 1982-03-24 | Fujitsu Ltd | Semiconductor memory device |
| JPS58142526A (en) * | 1982-02-19 | 1983-08-24 | Comput Basic Mach Technol Res Assoc | Patterning method of thin film |
-
1978
- 1978-11-20 JP JP53143091A patent/JPS6057229B2/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5750465A (en) * | 1980-09-11 | 1982-03-24 | Fujitsu Ltd | Semiconductor memory device |
| JPS58142526A (en) * | 1982-02-19 | 1983-08-24 | Comput Basic Mach Technol Res Assoc | Patterning method of thin film |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6057229B2 (en) | 1985-12-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0095209A3 (en) | Method of forming a resist mask resistant to plasma etching | |
| JPS5548935A (en) | Forming of electrode pattern | |
| JPS52120782A (en) | Manufacture of semiconductor device | |
| JPS5568674A (en) | Fabrication of charge coupled device | |
| JPS5664453A (en) | Manufacture of semiconductor device | |
| JPS5629326A (en) | Manufacture of semiconductor device | |
| JPS5680130A (en) | Manufacture of semiconductor device | |
| JPS5496363A (en) | Electrode forming method for semiconductor device | |
| JPS5691430A (en) | Preparation of semiconductor device | |
| JPS5655950A (en) | Photographic etching method | |
| JPS57198632A (en) | Fine pattern formation | |
| JPS54156488A (en) | Manufacture for semiconductor device | |
| JPS5655044A (en) | Formation of resist pattern | |
| JPS54162460A (en) | Electrode forming method | |
| JPS5629347A (en) | Manufacture of semiconductor device | |
| JPS54107289A (en) | Semiconductor light emitting element | |
| JPS57118641A (en) | Lifting-off method | |
| JPS5483378A (en) | Manufacture of semiconductor device | |
| JPS5749233A (en) | Laminar structure resist and forming method for pattern thereof | |
| JPS56108880A (en) | Selectively etching method for silicon oxide film | |
| JPS5591126A (en) | Production of semiconductor device | |
| JPS5558374A (en) | Etching method | |
| JPS5743425A (en) | Forming method for fine pattern | |
| JPS5527637A (en) | Photo-resist-pattern forming method | |
| JPS55134932A (en) | Preparation of semiconductor device |