JPS5558879A - Page replacement control system - Google Patents
Page replacement control systemInfo
- Publication number
- JPS5558879A JPS5558879A JP12019179A JP12019179A JPS5558879A JP S5558879 A JPS5558879 A JP S5558879A JP 12019179 A JP12019179 A JP 12019179A JP 12019179 A JP12019179 A JP 12019179A JP S5558879 A JPS5558879 A JP S5558879A
- Authority
- JP
- Japan
- Prior art keywords
- control system
- replacement control
- page replacement
- page
- replacement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
- G06F12/126—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/954,034 US4277826A (en) | 1978-10-23 | 1978-10-23 | Synchronizing mechanism for page replacement control |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5558879A true JPS5558879A (en) | 1980-05-01 |
JPS5740586B2 JPS5740586B2 (ja) | 1982-08-28 |
Family
ID=25494849
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12019179A Granted JPS5558879A (en) | 1978-10-23 | 1979-09-20 | Page replacement control system |
Country Status (6)
Country | Link |
---|---|
US (1) | US4277826A (ja) |
EP (1) | EP0010198B1 (ja) |
JP (1) | JPS5558879A (ja) |
BR (1) | BR7906842A (ja) |
DE (1) | DE2965742D1 (ja) |
IT (1) | IT1162587B (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57138079A (en) * | 1981-02-20 | 1982-08-26 | Toshiba Corp | Information processor |
US4491911A (en) * | 1981-03-03 | 1985-01-01 | Tokyo Shibaura Denki Kabushiki Kaisha | Data processing system with improved address translation facility |
Families Citing this family (53)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4481573A (en) * | 1980-11-17 | 1984-11-06 | Hitachi, Ltd. | Shared virtual address translation unit for a multiprocessor system |
US4482952A (en) * | 1980-12-15 | 1984-11-13 | Nippon Electric Co., Ltd. | Virtual addressing system using page field comparisons to selectively validate cache buffer data on read main memory data |
US4520441A (en) * | 1980-12-15 | 1985-05-28 | Hitachi, Ltd. | Data processing system |
US4432053A (en) * | 1981-06-29 | 1984-02-14 | Burroughs Corporation | Address generating apparatus and method |
US4476524A (en) * | 1981-07-02 | 1984-10-09 | International Business Machines Corporation | Page storage control methods and means |
US4481570A (en) * | 1981-08-07 | 1984-11-06 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Automatic multi-banking of memory for microprocessors |
US4503492A (en) * | 1981-09-11 | 1985-03-05 | Data General Corp. | Apparatus and methods for deriving addresses of data using painters whose values remain unchanged during an execution of a procedure |
US4450522A (en) * | 1981-09-11 | 1984-05-22 | Data General Corporation | Apparatus for deriving addresses of data using displacements from base addresses which change only on call and return |
JPS5994289A (ja) * | 1982-11-22 | 1984-05-30 | Hitachi Ltd | 記憶制御方式 |
US4736287A (en) * | 1983-06-20 | 1988-04-05 | Rational | Set association memory system |
US4577274A (en) * | 1983-07-11 | 1986-03-18 | At&T Bell Laboratories | Demand paging scheme for a multi-ATB shared memory processing system |
US4916603A (en) * | 1985-03-18 | 1990-04-10 | Wang Labortatories, Inc. | Distributed reference and change table for a virtual memory system |
US4780816A (en) * | 1986-05-16 | 1988-10-25 | The United States Of America As Represented By The Secretary Of The Army | Key-to-address transformations |
JPH0814803B2 (ja) * | 1986-05-23 | 1996-02-14 | 株式会社日立製作所 | アドレス変換方式 |
US4922417A (en) * | 1986-10-24 | 1990-05-01 | American Telephone And Telegraph Company | Method and apparatus for data hashing using selection from a table of random numbers in combination with folding and bit manipulation of the selected random numbers |
US4802086A (en) * | 1987-01-09 | 1989-01-31 | Motorola, Inc. | FINUFO cache replacement method and apparatus |
US5008820A (en) * | 1987-03-30 | 1991-04-16 | International Business Machines Corporation | Method of rapidly opening disk files identified by path names |
US5155834A (en) * | 1988-03-18 | 1992-10-13 | Wang Laboratories, Inc. | Reference and change table storage system for virtual memory data processing system having a plurality of processors accessing common memory |
EP0349123B1 (en) * | 1988-06-27 | 1995-09-20 | Digital Equipment Corporation | Multi-processor computer systems having shared memory and private cache memories |
US5222224A (en) * | 1989-02-03 | 1993-06-22 | Digital Equipment Corporation | Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor system |
JPH02273843A (ja) * | 1989-04-14 | 1990-11-08 | Nec Corp | スワッピング装置 |
US5133058A (en) * | 1989-09-18 | 1992-07-21 | Sun Microsystems, Inc. | Page-tagging translation look-aside buffer for a computer memory system |
EP0459233A3 (en) * | 1990-05-29 | 1992-04-08 | National Semiconductor Corporation | Selectively locking memory locations within a microprocessor's on-chip cache |
US5249286A (en) * | 1990-05-29 | 1993-09-28 | National Semiconductor Corporation | Selectively locking memory locations within a microprocessor's on-chip cache |
CA2045789A1 (en) * | 1990-06-29 | 1991-12-30 | Richard Lee Sites | Granularity hint for translation buffer in high performance processor |
JPH04230508A (ja) * | 1990-10-29 | 1992-08-19 | Internatl Business Mach Corp <Ibm> | 低電力消費メモリ装置 |
EP0549924A1 (en) * | 1992-01-03 | 1993-07-07 | International Business Machines Corporation | Asynchronous co-processor data mover method and means |
JPH05274152A (ja) * | 1992-03-27 | 1993-10-22 | Hitachi Ltd | オブジェクト管理方式 |
US5640607A (en) * | 1992-04-21 | 1997-06-17 | Microsoft Corporation | Method for sending bit mapped image by appending special code to text string and transmitting the text string separately from compressed residual image |
US5493663A (en) * | 1992-04-22 | 1996-02-20 | International Business Machines Corporation | Method and apparatus for predetermining pages for swapping from physical memory in accordance with the number of accesses |
US5463739A (en) * | 1992-12-22 | 1995-10-31 | International Business Machines Corporation | Apparatus for vetoing reallocation requests during a data transfer based on data bus latency and the number of received reallocation requests below a threshold |
FR2701578B1 (fr) * | 1993-02-16 | 1995-03-31 | Gemplus Card Int | Procédé d'écriture dans une mémoire non volatile, notamment dans une carte à mémoire. |
US5377337A (en) * | 1993-06-08 | 1994-12-27 | International Business Machines Corporation | Method and means for enabling virtual addressing control by software users over a hardware page transfer control entity |
US5568634A (en) * | 1994-04-21 | 1996-10-22 | Gemplus Card International | Method of writing in a non-volatile memory, notably in a memory card employing memory allocation strategies on size and occupancy basis |
US5889996A (en) * | 1996-12-16 | 1999-03-30 | Novell Inc. | Accelerator for interpretive environments |
US5983310A (en) | 1997-02-13 | 1999-11-09 | Novell, Inc. | Pin management of accelerator for interpretive environments |
US5813042A (en) * | 1997-02-19 | 1998-09-22 | International Business Machines Corp. | Methods and systems for control of memory |
US6141732A (en) * | 1998-03-24 | 2000-10-31 | Novell, Inc. | Burst-loading of instructions into processor cache by execution of linked jump instructions embedded in cache line size blocks |
US6356996B1 (en) * | 1998-03-24 | 2002-03-12 | Novell, Inc. | Cache fencing for interpretive environments |
US6578193B1 (en) | 1998-03-24 | 2003-06-10 | Novell, Inc. | Endian-neutral loader for interpretive environment |
US6279095B1 (en) * | 1998-11-09 | 2001-08-21 | Compaq Computer Corporation | Method and apparatus for omnibus wiring of virtual mapping table entries |
US6662289B1 (en) * | 2001-05-15 | 2003-12-09 | Hewlett-Packard Development Company, Lp. | Method and apparatus for direct conveyance of physical addresses from user level code to peripheral devices in virtual memory systems |
CA2419900A1 (en) * | 2003-02-26 | 2004-08-26 | Ibm Canada Limited - Ibm Canada Limitee | Relocating pages that are pinned in a buffer pool in a database system |
KR100529329B1 (ko) * | 2003-06-30 | 2005-11-17 | 삼성전자주식회사 | 다기능 수행 장치의 인쇄 방법 및 장치와 그 수행 장치를제어하는 컴퓨터 프로그램을 저장하는 컴퓨터로 읽을 수있는 기록 매체 |
US8214622B2 (en) * | 2004-05-27 | 2012-07-03 | International Business Machines Corporation | Facilitating management of storage of a pageable mode virtual environment absent intervention of a host of the environment |
GB0505289D0 (en) * | 2005-03-15 | 2005-04-20 | Symbian Software Ltd | Computing device with automated page based rem shadowing and method of operation |
US7734842B2 (en) * | 2006-03-28 | 2010-06-08 | International Business Machines Corporation | Computer-implemented method, apparatus, and computer program product for managing DMA write page faults using a pool of substitute pages |
US7941568B2 (en) * | 2008-05-05 | 2011-05-10 | International Business Machines Corporation | Mapping a virtual address to PCI bus address |
US7908457B2 (en) * | 2008-05-05 | 2011-03-15 | International Business Machines Corporation | Retaining an association between a virtual address based buffer and a user space application that owns the buffer |
US7543124B1 (en) | 2008-07-09 | 2009-06-02 | International Business Machines Corporation | Method for preventing page replacement of unreferenced read-ahead file pages |
US8250111B2 (en) * | 2009-02-27 | 2012-08-21 | International Business Machines Corporation | Automatic detection and correction of hot pages in a database system |
US8131976B2 (en) * | 2009-04-13 | 2012-03-06 | International Business Machines Corporation | Tracking effective addresses in an out-of-order processor |
US9164923B2 (en) * | 2011-07-01 | 2015-10-20 | Intel Corporation | Dynamic pinning of virtual pages shared between different type processors of a heterogeneous computing platform |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5197342A (ja) * | 1975-02-21 | 1976-08-26 | ||
JPS52156518A (en) * | 1976-06-21 | 1977-12-27 | Ibm | Address conversion controller |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3693165A (en) * | 1971-06-29 | 1972-09-19 | Ibm | Parallel addressing of a storage hierarchy in a data processing system using virtual addressing |
US3786427A (en) * | 1971-06-29 | 1974-01-15 | Ibm | Dynamic address translation reversed |
US3761881A (en) * | 1971-06-30 | 1973-09-25 | Ibm | Translation storage scheme for virtual memory system |
US3737881A (en) * | 1972-04-13 | 1973-06-05 | Ibm | Implementation of the least recently used (lru) algorithm using magnetic bubble domains |
US3854126A (en) * | 1972-10-10 | 1974-12-10 | Digital Equipment Corp | Circuit for converting virtual addresses into physical addresses |
US3839706A (en) * | 1973-07-02 | 1974-10-01 | Ibm | Input/output channel relocation storage protect mechanism |
FR130806A (ja) | 1973-11-21 | |||
US3979726A (en) * | 1974-04-10 | 1976-09-07 | Honeywell Information Systems, Inc. | Apparatus for selectively clearing a cache store in a processor having segmentation and paging |
US3938100A (en) * | 1974-06-07 | 1976-02-10 | Control Data Corporation | Virtual addressing apparatus for addressing the memory of a computer utilizing associative addressing techniques |
JPS5540950B2 (ja) * | 1974-11-30 | 1980-10-21 | ||
JPS6020767B2 (ja) * | 1975-06-24 | 1985-05-23 | 日本電気株式会社 | 情報探索機能を有する電子計算機 |
JPS5922977B2 (ja) | 1975-06-30 | 1984-05-30 | ハネイウエル・インフオメ−シヨン・システムスインコ−ポレ−テツド | 入出力装置によるペ−ジメモリ呼び出し方法 |
US4173783A (en) * | 1975-06-30 | 1979-11-06 | Honeywell Information Systems, Inc. | Method of accessing paged memory by an input-output unit |
US4035778A (en) * | 1975-11-17 | 1977-07-12 | International Business Machines Corporation | Apparatus for assigning space in a working memory as a function of the history of usage |
DE2641722C3 (de) * | 1976-09-16 | 1981-10-08 | Siemens AG, 1000 Berlin und 8000 München | Hierarchisch geordnetes Speichersystem für eine datenverarbeitende Anlage mit virtueller Adressierung |
US4084230A (en) * | 1976-11-29 | 1978-04-11 | International Business Machines Corporation | Hybrid semiconductor memory with on-chip associative page addressing, page replacement and control |
-
1978
- 1978-10-23 US US05/954,034 patent/US4277826A/en not_active Expired - Lifetime
-
1979
- 1979-09-20 JP JP12019179A patent/JPS5558879A/ja active Granted
- 1979-09-24 EP EP79103616A patent/EP0010198B1/de not_active Expired
- 1979-09-24 DE DE7979103616T patent/DE2965742D1/de not_active Expired
- 1979-09-28 IT IT7926079A patent/IT1162587B/it active
- 1979-10-23 BR BR7906842A patent/BR7906842A/pt not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5197342A (ja) * | 1975-02-21 | 1976-08-26 | ||
JPS52156518A (en) * | 1976-06-21 | 1977-12-27 | Ibm | Address conversion controller |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57138079A (en) * | 1981-02-20 | 1982-08-26 | Toshiba Corp | Information processor |
JPH0312339B2 (ja) * | 1981-02-20 | 1991-02-20 | Tokyo Shibaura Electric Co | |
US4491911A (en) * | 1981-03-03 | 1985-01-01 | Tokyo Shibaura Denki Kabushiki Kaisha | Data processing system with improved address translation facility |
Also Published As
Publication number | Publication date |
---|---|
EP0010198B1 (de) | 1983-06-22 |
IT1162587B (it) | 1987-04-01 |
DE2965742D1 (en) | 1983-07-28 |
EP0010198A3 (en) | 1980-10-01 |
IT7926079A0 (it) | 1979-09-28 |
EP0010198A2 (de) | 1980-04-30 |
JPS5740586B2 (ja) | 1982-08-28 |
BR7906842A (pt) | 1980-09-16 |
US4277826A (en) | 1981-07-07 |
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