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JPS5541555A - Data processing unit - Google Patents

Data processing unit

Info

Publication number
JPS5541555A
JPS5541555A JP11483978A JP11483978A JPS5541555A JP S5541555 A JPS5541555 A JP S5541555A JP 11483978 A JP11483978 A JP 11483978A JP 11483978 A JP11483978 A JP 11483978A JP S5541555 A JPS5541555 A JP S5541555A
Authority
JP
Japan
Prior art keywords
data
transfer control
data transfer
circuit
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11483978A
Other languages
Japanese (ja)
Inventor
Masao Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11483978A priority Critical patent/JPS5541555A/en
Publication of JPS5541555A publication Critical patent/JPS5541555A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To prevent overrun by displaying the comparison result between a data volume, which an I/O device can transfer in a prescribed time for every channel, and contents of a byte counter, which is updated in data transfer, for every channel.
CONSTITUTION: A data processing unit is constituted by comparator circuit 3 which compares a prescribed byte count registered in data transfer control table 1 with the byte count operation output of data address.byte count operation circuit 2 by indications from data transfer control table 1, data address byte counter operation circuit 2 and channel program 9 for every channel in respect to data address byte count and data transfer control information, data chained request selection circuit 4 which selects a data chained request generated by the output of comparator circuit 3 and data transfer control information of data transfer control table 1, and main memory access request circuit 5.
COPYRIGHT: (C)1980,JPO&Japio
JP11483978A 1978-09-19 1978-09-19 Data processing unit Pending JPS5541555A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11483978A JPS5541555A (en) 1978-09-19 1978-09-19 Data processing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11483978A JPS5541555A (en) 1978-09-19 1978-09-19 Data processing unit

Publications (1)

Publication Number Publication Date
JPS5541555A true JPS5541555A (en) 1980-03-24

Family

ID=14647982

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11483978A Pending JPS5541555A (en) 1978-09-19 1978-09-19 Data processing unit

Country Status (1)

Country Link
JP (1) JPS5541555A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5849472U (en) * 1981-09-29 1983-04-04 株式会社東芝 printed wiring board
JPH036864U (en) * 1989-06-07 1991-01-23

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5849472U (en) * 1981-09-29 1983-04-04 株式会社東芝 printed wiring board
JPH036864U (en) * 1989-06-07 1991-01-23

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