JPS5526747A - Direct-current bias generating circuit - Google Patents
Direct-current bias generating circuitInfo
- Publication number
- JPS5526747A JPS5526747A JP9965878A JP9965878A JPS5526747A JP S5526747 A JPS5526747 A JP S5526747A JP 9965878 A JP9965878 A JP 9965878A JP 9965878 A JP9965878 A JP 9965878A JP S5526747 A JPS5526747 A JP S5526747A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- direct
- circuit
- current bias
- variation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
- H03F3/16—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only with field-effect devices
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Pulse Circuits (AREA)
- Amplifiers (AREA)
Abstract
PURPOSE:To make it possible to obtain a direct-current bias capable of canceling variation in circuit operation due to variation in power voltage, etc., by providing a voltage divider circuit composed of IG-FET and an amplifier which inverts and amplifies divided voltages. CONSTITUTION:The voltage divider circuit consists of enhancement IG-FETs 11 and 13 and depletion IG-FET12, and the amplifier circuit which inverts and amplifies divided voltage (a) consists of enhancement IG-FETs 14 and 15; a voltage at connection point (b) is applied as a direct-current bias to the circuit formed in the same substrate as those circuit. Next, when direct-current applied voltage VDD becomes higher than a normal value, the voltage at point (a) rises and voltage V(b) at point (b) falls linearly according to variation in VDD. Namely, since direct- current bias V(b) varies to cancel variation in VDD, even if caused, variance in operation of the IG-FET circuit applied with this direct-current bias is canceled. When threshold voltage Vth of FETs 11 to 13 varies, it is canceled in the same way.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9965878A JPS5526747A (en) | 1978-08-16 | 1978-08-16 | Direct-current bias generating circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9965878A JPS5526747A (en) | 1978-08-16 | 1978-08-16 | Direct-current bias generating circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5526747A true JPS5526747A (en) | 1980-02-26 |
Family
ID=14253139
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9965878A Pending JPS5526747A (en) | 1978-08-16 | 1978-08-16 | Direct-current bias generating circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5526747A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS598494A (en) * | 1982-06-25 | 1984-01-17 | アタリ・インコ−ポレ−テツド | Digital delay circuit |
JPS62294320A (en) * | 1986-06-13 | 1987-12-21 | Sony Corp | Logic circuit |
-
1978
- 1978-08-16 JP JP9965878A patent/JPS5526747A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS598494A (en) * | 1982-06-25 | 1984-01-17 | アタリ・インコ−ポレ−テツド | Digital delay circuit |
JPS62294320A (en) * | 1986-06-13 | 1987-12-21 | Sony Corp | Logic circuit |
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