JPS5516540A - Pulse detection circuit - Google Patents
Pulse detection circuitInfo
- Publication number
- JPS5516540A JPS5516540A JP8896678A JP8896678A JPS5516540A JP S5516540 A JPS5516540 A JP S5516540A JP 8896678 A JP8896678 A JP 8896678A JP 8896678 A JP8896678 A JP 8896678A JP S5516540 A JPS5516540 A JP S5516540A
- Authority
- JP
- Japan
- Prior art keywords
- potential
- fett
- vdd
- fets
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE: To reduce power consumption by increasing pulse detection precision even when an input signal is low in voltage, by connecting a capacitor between outputs of two complementary inverters with their inputs connected in common and an integrating circuit to either inverter.
CONSTITUTION: With a clock pulse of potential VDD inputted to input terminal CLK, P channel FETs T3 and T5 are OFF and W channel FETs T4 and T6 are ON, so that a voltage across capacitor C3 will be Vss. With a clock pulse of potential Vss, FETs T3 and T5 are ON and FETs T4 and T6 are OFF; and the potential of C3 at the FETT3 side becomes VDD and an differential waveform appears at the FETT5 side. Since FETT5 is conducting at this time, the potential of C3 at the FETT5 side is transferred, as it is, to the integrating circuit composed of capacitor C4 and resistance R3, so that the potential of point D will be held at approximate VDD. Next, when the clock pulse becomes potential VDD, the potential of point D decreases by a time constant of C3 by R3 and the output of inverter INV2 can be held at a potential of Vss.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8896678A JPS5516540A (en) | 1978-07-20 | 1978-07-20 | Pulse detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8896678A JPS5516540A (en) | 1978-07-20 | 1978-07-20 | Pulse detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5516540A true JPS5516540A (en) | 1980-02-05 |
| JPS6243367B2 JPS6243367B2 (en) | 1987-09-14 |
Family
ID=13957552
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8896678A Granted JPS5516540A (en) | 1978-07-20 | 1978-07-20 | Pulse detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5516540A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5916423A (en) * | 1982-07-20 | 1984-01-27 | Fujitsu Ltd | Signal disconnection detection circuit |
| JPH01314420A (en) * | 1988-06-14 | 1989-12-19 | Fujitsu Ltd | semiconductor integrated circuit |
| US6043749A (en) * | 1997-04-16 | 2000-03-28 | Nec Corporation | Frequency detection circuit |
-
1978
- 1978-07-20 JP JP8896678A patent/JPS5516540A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5916423A (en) * | 1982-07-20 | 1984-01-27 | Fujitsu Ltd | Signal disconnection detection circuit |
| JPH01314420A (en) * | 1988-06-14 | 1989-12-19 | Fujitsu Ltd | semiconductor integrated circuit |
| US6043749A (en) * | 1997-04-16 | 2000-03-28 | Nec Corporation | Frequency detection circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6243367B2 (en) | 1987-09-14 |
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