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JPS55133121A - Conversion circuit of two to four lines - Google Patents

Conversion circuit of two to four lines

Info

Publication number
JPS55133121A
JPS55133121A JP3985579A JP3985579A JPS55133121A JP S55133121 A JPS55133121 A JP S55133121A JP 3985579 A JP3985579 A JP 3985579A JP 3985579 A JP3985579 A JP 3985579A JP S55133121 A JPS55133121 A JP S55133121A
Authority
JP
Japan
Prior art keywords
impedance
line
elements
terminal
line side
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3985579A
Other languages
Japanese (ja)
Inventor
Tetsuya Kono
Kozo Kamata
Yoshinori Nagoya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3985579A priority Critical patent/JPS55133121A/en
Publication of JPS55133121A publication Critical patent/JPS55133121A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H04B1/54—Circuits using the same frequency for two directions of communication
    • H04B1/58—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/03—Hybrid circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Networks Using Active Elements (AREA)

Abstract

PURPOSE:To reduce the side tone of a telephone set without deteriorating the echo characteristics of hybrid circuit, by obtaining non-echoic condition independently of frequency and taking the impedance matching at two line side. CONSTITUTION:The input amplifier output impedance 2 is made a low resistant. Further, the impedance of the series arm elements 4, 5 is constituted to keep the relation of Z1:nZ1(n>>1) independently of frequency, and Z1 is made equal to the two line side impedance 1 or approximated practically. The signal from the 4 line input terminal 8 is amplified at the input amplifier 6, and the output enters the elements 4, 5. Since the impedance 2 is selected to smaller in comparison with the impedance of the elements 4, 5, the inside power consumption is very small. Further, since the potential of the junction points 10, 11 is equi-potential, and no power from the terminal 8 is leaked to the 4 line output terminal 9. Further, since the impedance of the balanced connection network 3 is taken n times the impedance 1, the power is almost consumed at the two line side.
JP3985579A 1979-04-04 1979-04-04 Conversion circuit of two to four lines Pending JPS55133121A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3985579A JPS55133121A (en) 1979-04-04 1979-04-04 Conversion circuit of two to four lines

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3985579A JPS55133121A (en) 1979-04-04 1979-04-04 Conversion circuit of two to four lines

Publications (1)

Publication Number Publication Date
JPS55133121A true JPS55133121A (en) 1980-10-16

Family

ID=12564577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3985579A Pending JPS55133121A (en) 1979-04-04 1979-04-04 Conversion circuit of two to four lines

Country Status (1)

Country Link
JP (1) JPS55133121A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5979644A (en) * 1982-10-29 1984-05-08 Anritsu Corp Electronic hybrid circuit
JPS6042946A (en) * 1983-07-22 1985-03-07 プレツシ−　オ−バ−シ−ズ　リミテツド Adaptive line hybrid circuit
JPS60251725A (en) * 1984-05-28 1985-12-12 Toa Tokushu Denki Kk Talking circuit
JP2008522553A (en) * 2004-12-02 2008-06-26 ソーラーフレア・コミュニケーションズ・インコーポレイテッド Separation of transmitted and received signals

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5979644A (en) * 1982-10-29 1984-05-08 Anritsu Corp Electronic hybrid circuit
JPS6042946A (en) * 1983-07-22 1985-03-07 プレツシ−　オ−バ−シ−ズ　リミテツド Adaptive line hybrid circuit
JPS60251725A (en) * 1984-05-28 1985-12-12 Toa Tokushu Denki Kk Talking circuit
JP2008522553A (en) * 2004-12-02 2008-06-26 ソーラーフレア・コミュニケーションズ・インコーポレイテッド Separation of transmitted and received signals

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