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JPS5475257A - Manual clock count control system - Google Patents

Manual clock count control system

Info

Publication number
JPS5475257A
JPS5475257A JP14300077A JP14300077A JPS5475257A JP S5475257 A JPS5475257 A JP S5475257A JP 14300077 A JP14300077 A JP 14300077A JP 14300077 A JP14300077 A JP 14300077A JP S5475257 A JPS5475257 A JP S5475257A
Authority
JP
Japan
Prior art keywords
control system
clock count
count control
counter
data processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14300077A
Other languages
Japanese (ja)
Inventor
Shigeru Nagasawa
Minoru Etsuno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14300077A priority Critical patent/JPS5475257A/en
Publication of JPS5475257A publication Critical patent/JPS5475257A/en
Pending legal-status Critical Current

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  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE: To secure the desired internal state within the data processor in a quick and accurate way.
CONSTITUTION: The CP number is set (1) properly to generate the advance signal with push of the key, and then FF5 is set to open gate 6. As a result, the pulse of oscillator 4 is supplied to each part of the data processor in the form of the clock signal. At the same time, counter 3 counts the pulse number. And when a coincidence is obtained between the contents of counter 3 the set CP number, FF5 is reset to close gate 6. Thus, clock source 7 is formed to be installed in the memory control unit.
COPYRIGHT: (C)1979,JPO&Japio
JP14300077A 1977-11-29 1977-11-29 Manual clock count control system Pending JPS5475257A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14300077A JPS5475257A (en) 1977-11-29 1977-11-29 Manual clock count control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14300077A JPS5475257A (en) 1977-11-29 1977-11-29 Manual clock count control system

Publications (1)

Publication Number Publication Date
JPS5475257A true JPS5475257A (en) 1979-06-15

Family

ID=15328601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14300077A Pending JPS5475257A (en) 1977-11-29 1977-11-29 Manual clock count control system

Country Status (1)

Country Link
JP (1) JPS5475257A (en)

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