[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

JPS5469068A - Semiconductor device and its manufacture - Google Patents

Semiconductor device and its manufacture

Info

Publication number
JPS5469068A
JPS5469068A JP13572077A JP13572077A JPS5469068A JP S5469068 A JPS5469068 A JP S5469068A JP 13572077 A JP13572077 A JP 13572077A JP 13572077 A JP13572077 A JP 13572077A JP S5469068 A JPS5469068 A JP S5469068A
Authority
JP
Japan
Prior art keywords
frame
sealing substance
tab
pellet
wax
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13572077A
Other languages
Japanese (ja)
Inventor
Eiji Oi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13572077A priority Critical patent/JPS5469068A/en
Publication of JPS5469068A publication Critical patent/JPS5469068A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To form an ultra-miniature device by exposing the surface of plural external terminals of the metal plate on the lower surface of the sealing substance and connecting the other end to the element electrode within the sealing substance. CONSTITUTION:Lead frame 14 is sticked onto glass plate 12 via wax 13. In the frame, unit pattern 15 is formed into a matrix shape, and tab 18 and external terminal 19 are provided at the tip of tab lead 17. Pellet 20 is adhered on tab 18, and the electrode is connected (21) to external 11. Then the resin is sticked onto frame 14, and sealing substance 22 covers the pellet, wire and frame. Notch groove 23 is made to reach the glass layer. Then wax 13 is fused, and device 25 unified via sealing substance 22 is isolated from plate 12. In this way, an accurate assembling becomes possible, and thus a large-scale batch process can be carried out.
JP13572077A 1977-11-14 1977-11-14 Semiconductor device and its manufacture Pending JPS5469068A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13572077A JPS5469068A (en) 1977-11-14 1977-11-14 Semiconductor device and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13572077A JPS5469068A (en) 1977-11-14 1977-11-14 Semiconductor device and its manufacture

Publications (1)

Publication Number Publication Date
JPS5469068A true JPS5469068A (en) 1979-06-02

Family

ID=15158296

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13572077A Pending JPS5469068A (en) 1977-11-14 1977-11-14 Semiconductor device and its manufacture

Country Status (1)

Country Link
JP (1) JPS5469068A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5556647A (en) * 1978-10-19 1980-04-25 Cii Honeywell Bull Flat package for at least one integrated circuit device
US5832600A (en) * 1995-06-06 1998-11-10 Seiko Epson Corporation Method of mounting electronic parts
WO2002001634A2 (en) * 2000-06-27 2002-01-03 Infineon Technologies Ag System support for semiconductor chips and electronic components and method for producing a system support and electronic components
US9287476B2 (en) 2008-09-03 2016-03-15 Nichia Corporation Light emitting device, resin package, resin-molded body, and methods for manufacturing light emitting device, resin package and resin-molded body

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5556647A (en) * 1978-10-19 1980-04-25 Cii Honeywell Bull Flat package for at least one integrated circuit device
US5832600A (en) * 1995-06-06 1998-11-10 Seiko Epson Corporation Method of mounting electronic parts
WO2002001634A2 (en) * 2000-06-27 2002-01-03 Infineon Technologies Ag System support for semiconductor chips and electronic components and method for producing a system support and electronic components
WO2002001634A3 (en) * 2000-06-27 2002-06-20 Infineon Technologies Ag System support for semiconductor chips and electronic components and method for producing a system support and electronic components
US6969905B2 (en) 2000-06-27 2005-11-29 Infineon Technologies Ag Leadframe for semiconductor chips and electronic devices and production methods for a leadframe and for electronic devices
US9287476B2 (en) 2008-09-03 2016-03-15 Nichia Corporation Light emitting device, resin package, resin-molded body, and methods for manufacturing light emitting device, resin package and resin-molded body
US9490411B2 (en) 2008-09-03 2016-11-08 Nichia Corporation Light emitting device, resin package, resin-molded body, and methods for manufacturing light emitting device, resin package and resin-molded body
US9537071B2 (en) 2008-09-03 2017-01-03 Nichia Corporation Light emitting device, resin package, resin-molded body, and methods for manufacturing light emitting device, resin package and resin-molded body
US10115870B2 (en) 2008-09-03 2018-10-30 Nichia Corporation Light emitting device, resin package, resin-molded body, and methods for manufacturing light emitting device, resin package and resin-molded body
US10573788B2 (en) 2008-09-03 2020-02-25 Nichia Corporation Light emitting device, resin package, resin-molded body, and methods for manufacturing light emitting device, resin package and resin-molded body
US10573789B2 (en) 2008-09-03 2020-02-25 Nichia Corporation Light emitting device, resin package, resin-molded body, and methods for manufacturing light emitting device, resin package and resin-molded body
US10700241B2 (en) 2008-09-03 2020-06-30 Nichia Corporation Light emitting device, resin package, resin-molded body, and methods for manufacturing light emitting device, resin package and resin-molded body
US11094854B2 (en) 2008-09-03 2021-08-17 Nichia Corporation Light emitting device, resin package, resin-molded body, and methods for manufacturing light emitting device, resin package and resin-molded body

Similar Documents

Publication Publication Date Title
JPS55163850A (en) Semiconductor device
JPS5469068A (en) Semiconductor device and its manufacture
JPS5543878A (en) Circuit unit
JPS5632749A (en) Manufacture of semiconductor device
JPS57154863A (en) Manufacture of resin sealing type electronic parts
JPS54129880A (en) Manufacture for semiconductor device
JPS54140468A (en) Glass sealing package type device and its manufacture
JPS5618451A (en) Manufacture of substrate for semiconductor device
JPS5588026A (en) Production of optical display cell
JPS55138240A (en) Manufacture of semiconductor device
JPS54139538A (en) Production of multistylus electrode recording head
JPS54159197A (en) Liquid crystal display element
JPS5612624A (en) Electrochromic display body
JPS5791571A (en) Manufacture of light module
JPS6436055A (en) Method of sealing electronic component
JPS52113677A (en) Production of semiconductor device
JPS5582456A (en) Semiconductor device
JPS5745964A (en) Manufacture of hybrid integrated circuit
JPS5496367A (en) Semiconductor device
CH609527B (en) PROCESS FOR MANUFACTURING TIGHTLY SEALED CONNECTIONS.
JPS5571045A (en) Lead frame
JPS5635448A (en) Semiconductor device
JPS52104869A (en) Manufacture for semiconductor device
JPS63141982U (en)
JPS57103336A (en) Semiconductor device