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JPS5465447A - Data processor - Google Patents

Data processor

Info

Publication number
JPS5465447A
JPS5465447A JP13234877A JP13234877A JPS5465447A JP S5465447 A JPS5465447 A JP S5465447A JP 13234877 A JP13234877 A JP 13234877A JP 13234877 A JP13234877 A JP 13234877A JP S5465447 A JPS5465447 A JP S5465447A
Authority
JP
Japan
Prior art keywords
data
word
indicator
unit
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13234877A
Other languages
Japanese (ja)
Other versions
JPS6016649B2 (en
Inventor
Yoshinari Nakasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13234877A priority Critical patent/JPS6016649B2/en
Publication of JPS5465447A publication Critical patent/JPS5465447A/en
Publication of JPS6016649B2 publication Critical patent/JPS6016649B2/en
Expired legal-status Critical Current

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  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE: To ensure a highly efficient operation by providing the contents indicator, the data tester and others and furthermore to shift the arithmetic result efficiently in accordance with the data length of the reception side where the srithmetic result is stored.
CONSTITUTION: The output given from shift circuit 20 is stored in temporary memory unit 22, and at the same time whether the data of one word are all 0 or not is tested through data tester 24. And 0 is delivered when all data are 0; while 1 is delivered when the figures other than 0 exists. The srithmetic symmetric data storage position to unit 22 is designated through arithmetic address register 26, and furthermore the output of tester 24 is stored in the bit of contents indicator 28(comprising the same number of FF as the word number of unit 22) which is designated by register 26. Accordingly, each bit of indicator 28 shows whether the contents of the word is all 0 or not corresponding to each word of unit 22. When the word indicated by register 26 is read out in the form of the arithmetic object data, the information of the bit corresponding in indicator 28 is used as the selection signal of selector circut 30.
COPYRIGHT: (C)1979,JPO&Japio
JP13234877A 1977-11-02 1977-11-02 data processing equipment Expired JPS6016649B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13234877A JPS6016649B2 (en) 1977-11-02 1977-11-02 data processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13234877A JPS6016649B2 (en) 1977-11-02 1977-11-02 data processing equipment

Publications (2)

Publication Number Publication Date
JPS5465447A true JPS5465447A (en) 1979-05-26
JPS6016649B2 JPS6016649B2 (en) 1985-04-26

Family

ID=15079240

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13234877A Expired JPS6016649B2 (en) 1977-11-02 1977-11-02 data processing equipment

Country Status (1)

Country Link
JP (1) JPS6016649B2 (en)

Also Published As

Publication number Publication date
JPS6016649B2 (en) 1985-04-26

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