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JPS5457848A - Detecting correction system for block error - Google Patents

Detecting correction system for block error

Info

Publication number
JPS5457848A
JPS5457848A JP12386177A JP12386177A JPS5457848A JP S5457848 A JPS5457848 A JP S5457848A JP 12386177 A JP12386177 A JP 12386177A JP 12386177 A JP12386177 A JP 12386177A JP S5457848 A JPS5457848 A JP S5457848A
Authority
JP
Japan
Prior art keywords
bit
information
error
circuit
correction system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12386177A
Other languages
Japanese (ja)
Other versions
JPS594741B2 (en
Inventor
Shigeo Kaneda
Eiji Fujiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP52123861A priority Critical patent/JPS594741B2/en
Publication of JPS5457848A publication Critical patent/JPS5457848A/en
Publication of JPS594741B2 publication Critical patent/JPS594741B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

PURPOSE: To constitute a circuit suitable to LSI implementation by using relative b-bit error correcting codes which are able to detct an error of 2.b bits occurring to two blocks.
CONSTITUTION: Information 6 is converted into check bit 7 by check bit generating circuit 1 and then applied to processor 2. By syndrome generating circuit 3, output information 9 is converted into syndrome bit 12, which becomes error-position indication information bit 10 through decoder circuit 4, and the bit 10 and information 8 which corresponds to information 6 in output information 9 are applied to error correction circuit 5, where the error is corrected
COPYRIGHT: (C)1979,JPO&Japio
JP52123861A 1977-10-15 1977-10-15 Block error detection and correction method Expired JPS594741B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52123861A JPS594741B2 (en) 1977-10-15 1977-10-15 Block error detection and correction method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52123861A JPS594741B2 (en) 1977-10-15 1977-10-15 Block error detection and correction method

Publications (2)

Publication Number Publication Date
JPS5457848A true JPS5457848A (en) 1979-05-10
JPS594741B2 JPS594741B2 (en) 1984-01-31

Family

ID=14871193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52123861A Expired JPS594741B2 (en) 1977-10-15 1977-10-15 Block error detection and correction method

Country Status (1)

Country Link
JP (1) JPS594741B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2187527A2 (en) 2008-11-18 2010-05-19 Fujitsu Limited Error judging circuit and shared memory system

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS626338U (en) * 1985-06-28 1987-01-14
JPS6211132U (en) * 1985-07-01 1987-01-23

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2187527A2 (en) 2008-11-18 2010-05-19 Fujitsu Limited Error judging circuit and shared memory system
US8327236B2 (en) 2008-11-18 2012-12-04 Fujitsu Limited Error judging circuit and shared memory system

Also Published As

Publication number Publication date
JPS594741B2 (en) 1984-01-31

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