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JPS5454561A - Level shift circuit - Google Patents

Level shift circuit

Info

Publication number
JPS5454561A
JPS5454561A JP12097777A JP12097777A JPS5454561A JP S5454561 A JPS5454561 A JP S5454561A JP 12097777 A JP12097777 A JP 12097777A JP 12097777 A JP12097777 A JP 12097777A JP S5454561 A JPS5454561 A JP S5454561A
Authority
JP
Japan
Prior art keywords
mosfet
electrode
level shift
shift circuit
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12097777A
Other languages
Japanese (ja)
Inventor
Masaru Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12097777A priority Critical patent/JPS5454561A/en
Publication of JPS5454561A publication Critical patent/JPS5454561A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/50Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower
    • H03F3/505Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower with field-effect devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To prevent malfunction due to noise and to perform high speed and low power consumption for integrated circuit, by taking the constitution that the drain of the first MOSFET and the source of the second MOSFET are serially connected. CONSTITUTION:The drain electrode D11 of the first MOSFET Q11 is connected to the power supply line 11, and the source electrode S12 of the second MOSFET Q12 is connected respectively to the ground line 12, the gate electrode G11 of Q11 is to the input terminal 13, the gate electrode G12 of Q12 is to the power supply line 11, and the source electrode Q11 and the drain electrode D12 of Q12 are connected commonly, constituting the output terminal 14. Since the level shift circuit is thus constituted, if the input is as shown in solid line A, the threshold voltage of FET at the integrated circuit is as high as 6.0V, the output can sufficiently be lowered 1.0V or less as shown in dotted lines B.
JP12097777A 1977-10-11 1977-10-11 Level shift circuit Pending JPS5454561A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12097777A JPS5454561A (en) 1977-10-11 1977-10-11 Level shift circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12097777A JPS5454561A (en) 1977-10-11 1977-10-11 Level shift circuit

Publications (1)

Publication Number Publication Date
JPS5454561A true JPS5454561A (en) 1979-04-28

Family

ID=14799716

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12097777A Pending JPS5454561A (en) 1977-10-11 1977-10-11 Level shift circuit

Country Status (1)

Country Link
JP (1) JPS5454561A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50138745A (en) * 1974-04-23 1975-11-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50138745A (en) * 1974-04-23 1975-11-05

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