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JPS542683A - Semiconductor chip - Google Patents

Semiconductor chip

Info

Publication number
JPS542683A
JPS542683A JP6741977A JP6741977A JPS542683A JP S542683 A JPS542683 A JP S542683A JP 6741977 A JP6741977 A JP 6741977A JP 6741977 A JP6741977 A JP 6741977A JP S542683 A JPS542683 A JP S542683A
Authority
JP
Japan
Prior art keywords
semiconductor chip
chip surface
circumference
lines
connection terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6741977A
Other languages
Japanese (ja)
Inventor
Satoshi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP6741977A priority Critical patent/JPS542683A/en
Publication of JPS542683A publication Critical patent/JPS542683A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To improve integration using a limited area effectively, by forming external connection terminal groups at the circumference of a semiconductor chip surface in lines and even at the center part of the chip surface.
JP6741977A 1977-06-08 1977-06-08 Semiconductor chip Pending JPS542683A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6741977A JPS542683A (en) 1977-06-08 1977-06-08 Semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6741977A JPS542683A (en) 1977-06-08 1977-06-08 Semiconductor chip

Publications (1)

Publication Number Publication Date
JPS542683A true JPS542683A (en) 1979-01-10

Family

ID=13344357

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6741977A Pending JPS542683A (en) 1977-06-08 1977-06-08 Semiconductor chip

Country Status (1)

Country Link
JP (1) JPS542683A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6089955A (en) * 1983-10-21 1985-05-20 Mitsubishi Electric Corp Semiconductor device
US4733288A (en) * 1982-06-30 1988-03-22 Fujitsu Limited Gate-array chip
US4864381A (en) * 1986-06-23 1989-09-05 Harris Corporation Hierarchical variable die size gate array architecture
US4978633A (en) * 1989-08-22 1990-12-18 Harris Corporation Hierarchical variable die size gate array architecture
US5184208A (en) * 1987-06-30 1993-02-02 Hitachi, Ltd. Semiconductor device
US5365113A (en) * 1987-06-30 1994-11-15 Hitachi, Ltd. Semiconductor device
US5643830A (en) * 1993-05-05 1997-07-01 Lsi Logic Corporation Process for manufacturing off-axis power branches for interior bond pad arrangements
US7154187B2 (en) 2003-12-24 2006-12-26 Seiko Epson Corporation Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4733288A (en) * 1982-06-30 1988-03-22 Fujitsu Limited Gate-array chip
JPH0514428B2 (en) * 1983-10-21 1993-02-25 Mitsubishi Electric Corp
JPS6089955A (en) * 1983-10-21 1985-05-20 Mitsubishi Electric Corp Semiconductor device
US4864381A (en) * 1986-06-23 1989-09-05 Harris Corporation Hierarchical variable die size gate array architecture
US5742101A (en) * 1987-06-30 1998-04-21 Hitachi, Ltd. Semiconductor device
US5184208A (en) * 1987-06-30 1993-02-02 Hitachi, Ltd. Semiconductor device
US5365113A (en) * 1987-06-30 1994-11-15 Hitachi, Ltd. Semiconductor device
US5514905A (en) * 1987-06-30 1996-05-07 Hitachi, Ltd. Semiconductor device
US4978633A (en) * 1989-08-22 1990-12-18 Harris Corporation Hierarchical variable die size gate array architecture
US5643830A (en) * 1993-05-05 1997-07-01 Lsi Logic Corporation Process for manufacturing off-axis power branches for interior bond pad arrangements
US7154187B2 (en) 2003-12-24 2006-12-26 Seiko Epson Corporation Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device
US7525200B2 (en) 2003-12-24 2009-04-28 Seiko Epson Corporation Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device
US7786598B2 (en) 2003-12-24 2010-08-31 Seiko Epson Corporation Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device
US7872358B2 (en) 2003-12-24 2011-01-18 Seiko Epson Corporation Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device
US8338965B2 (en) 2003-12-24 2012-12-25 Seiko Epson Corporation Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device

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