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JPS54159153A - Flip flop circuit - Google Patents

Flip flop circuit

Info

Publication number
JPS54159153A
JPS54159153A JP6842578A JP6842578A JPS54159153A JP S54159153 A JPS54159153 A JP S54159153A JP 6842578 A JP6842578 A JP 6842578A JP 6842578 A JP6842578 A JP 6842578A JP S54159153 A JPS54159153 A JP S54159153A
Authority
JP
Japan
Prior art keywords
circuit
constituted
type
mos transistor
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6842578A
Other languages
Japanese (ja)
Inventor
Hideji Koike
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6842578A priority Critical patent/JPS54159153A/en
Publication of JPS54159153A publication Critical patent/JPS54159153A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356069—Bistable circuits using additional transistors in the feedback circuit

Abstract

PURPOSE:To reduce the number of element and cross wirings and to store the data stably, by constituting FF circuit with two sets of latch circuits in connection. CONSTITUTION:In the D type FF circuit fo master slave type, constituted with the connection of the latch circuits 1, 2 consisting of MOS transistors, by using the depletion type MOS transistor T1 as the fedback transfer gate 13' of the latch circuit 1', the gate is connected to the output terminal of the feedback inverter 12 consisting of the depletion type load MOS transistor T2 and the enhancement type driver MOS transistor T3. R-SFF circuit is constituted by using the FF circuit 5 thus constituted, and the saturation current of the transistor T1 and T2 is taken greater than the leakage current of the transfer gates 61 and 62 respectively, then the terminal D stores the data stably. Further, with this constitution, the number of elements is reduced and the cross wirings can be avoided.
JP6842578A 1978-06-07 1978-06-07 Flip flop circuit Pending JPS54159153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6842578A JPS54159153A (en) 1978-06-07 1978-06-07 Flip flop circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6842578A JPS54159153A (en) 1978-06-07 1978-06-07 Flip flop circuit

Publications (1)

Publication Number Publication Date
JPS54159153A true JPS54159153A (en) 1979-12-15

Family

ID=13373312

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6842578A Pending JPS54159153A (en) 1978-06-07 1978-06-07 Flip flop circuit

Country Status (1)

Country Link
JP (1) JPS54159153A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016006888A (en) * 2009-12-11 2016-01-14 株式会社半導体エネルギー研究所 Semiconductor device
WO2020115841A1 (en) * 2018-12-05 2020-06-11 シャープ株式会社 Shift register, display device, and method for controlling shift register

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016006888A (en) * 2009-12-11 2016-01-14 株式会社半導体エネルギー研究所 Semiconductor device
US10382016B2 (en) 2009-12-11 2019-08-13 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile latch circuit and logic circuit, and semiconductor device using the same
WO2020115841A1 (en) * 2018-12-05 2020-06-11 シャープ株式会社 Shift register, display device, and method for controlling shift register

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