JPS54158827A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPS54158827A JPS54158827A JP6799978A JP6799978A JPS54158827A JP S54158827 A JPS54158827 A JP S54158827A JP 6799978 A JP6799978 A JP 6799978A JP 6799978 A JP6799978 A JP 6799978A JP S54158827 A JPS54158827 A JP S54158827A
- Authority
- JP
- Japan
- Prior art keywords
- bit lines
- bit
- line
- multiplexers
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Static Random-Access Memory (AREA)
Abstract
PURPOSE: To make it possible to increase bit density by reducing an interval of bit lines to minimum pattern size by arranging several bit lines at both the sides a of sense amplifier and by making mutual connections among them by multiplexers.
CONSTITUTION: Multiplexers 16 and 17 connect sense amplifier 1 to the 1st bit line 12 and 14 or 2nd bit lines 13 and 15 selectively. When merory 2 connected to bit line 12 is selected by address line 8, dummy line 5 connected to bit line 14 is selected by dummy address line 11, bit lines 12 and 14 are connected to amplifier 1 by multiplexers 16 and 17, and a slight potential difference developed between bit lines 12 and 14 is sensed and amplified 1, thereby reading pieces of information of "1" and "0". Because of the constitution mentioned above, sufficient sensitivity can be obtained even if the area of amplifier 1 is large, so that individual memory cells can be reduced to an allowable area with an minimum pattern size.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6799978A JPS54158827A (en) | 1978-06-05 | 1978-06-05 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6799978A JPS54158827A (en) | 1978-06-05 | 1978-06-05 | Semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54158827A true JPS54158827A (en) | 1979-12-15 |
Family
ID=13361153
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6799978A Pending JPS54158827A (en) | 1978-06-05 | 1978-06-05 | Semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54158827A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5577083A (en) * | 1978-12-04 | 1980-06-10 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Semiconductor memory unit |
JPS5877091A (en) * | 1981-10-30 | 1983-05-10 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Memory device |
JPS6134792A (en) * | 1984-07-25 | 1986-02-19 | Toshiba Corp | Semiconductor memory device |
JPS61242396A (en) * | 1985-04-19 | 1986-10-28 | Nec Corp | Semiconductor memory |
JPH059270U (en) * | 1991-07-25 | 1993-02-09 | 株式会社浅利研究所 | Squid hook |
-
1978
- 1978-06-05 JP JP6799978A patent/JPS54158827A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5577083A (en) * | 1978-12-04 | 1980-06-10 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Semiconductor memory unit |
JPS5877091A (en) * | 1981-10-30 | 1983-05-10 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Memory device |
JPS6134792A (en) * | 1984-07-25 | 1986-02-19 | Toshiba Corp | Semiconductor memory device |
JPS61242396A (en) * | 1985-04-19 | 1986-10-28 | Nec Corp | Semiconductor memory |
JPH059270U (en) * | 1991-07-25 | 1993-02-09 | 株式会社浅利研究所 | Squid hook |
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