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JPS54140444A - Ratch circuit - Google Patents

Ratch circuit

Info

Publication number
JPS54140444A
JPS54140444A JP4778178A JP4778178A JPS54140444A JP S54140444 A JPS54140444 A JP S54140444A JP 4778178 A JP4778178 A JP 4778178A JP 4778178 A JP4778178 A JP 4778178A JP S54140444 A JPS54140444 A JP S54140444A
Authority
JP
Japan
Prior art keywords
circuit
ratch
high level
phicl
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4778178A
Other languages
Japanese (ja)
Inventor
Akira Kikuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4778178A priority Critical patent/JPS54140444A/en
Publication of JPS54140444A publication Critical patent/JPS54140444A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors

Abstract

PURPOSE:To secure the input with the timing in which two writing signals do not compete with each other and via two writing terminals and thus to obtain an easy to-handle ratch circuit. CONSTITUTION:In case both control pulse phiCL and writing input signal DATA are at high level, the output of the ratch circuit can be set to Q (high) and Q (low) levels. The above state can be kept even if pulse phiCL features low level. When pulse phiCL is set to high level, the output of the ratch circuit is rewritten in case the DATA signal is at low level. And the above state can be kept even with pulse phiCL set at low level. Under these conditions, both control pulse phiS and writing signal SD are set high level. And thus Q5 and Q6 of the inverter circuit are turned off with gate circuit 4 turned on. As a result, the high level is applied to the input of inverter circuit 1, thus ratch output Q set to high level.
JP4778178A 1978-04-24 1978-04-24 Ratch circuit Pending JPS54140444A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4778178A JPS54140444A (en) 1978-04-24 1978-04-24 Ratch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4778178A JPS54140444A (en) 1978-04-24 1978-04-24 Ratch circuit

Publications (1)

Publication Number Publication Date
JPS54140444A true JPS54140444A (en) 1979-10-31

Family

ID=12784905

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4778178A Pending JPS54140444A (en) 1978-04-24 1978-04-24 Ratch circuit

Country Status (1)

Country Link
JP (1) JPS54140444A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5711526A (en) * 1980-06-25 1982-01-21 Nec Corp Latch circuit
JPS57106229A (en) * 1980-12-23 1982-07-02 Seiko Epson Corp Cmos multiinput storage circuit
JPS5979632A (en) * 1982-10-29 1984-05-08 Hitachi Micro Comput Eng Ltd Latch circuit
JPH01183211A (en) * 1988-01-18 1989-07-21 Sharp Corp Signal holding circuit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5711526A (en) * 1980-06-25 1982-01-21 Nec Corp Latch circuit
JPH0245373B2 (en) * 1980-06-25 1990-10-09 Nippon Electric Co
JPS57106229A (en) * 1980-12-23 1982-07-02 Seiko Epson Corp Cmos multiinput storage circuit
JPS5979632A (en) * 1982-10-29 1984-05-08 Hitachi Micro Comput Eng Ltd Latch circuit
JPH01183211A (en) * 1988-01-18 1989-07-21 Sharp Corp Signal holding circuit

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