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JPS54137984A - Manufacture of floating gate mos semiconductor device - Google Patents

Manufacture of floating gate mos semiconductor device

Info

Publication number
JPS54137984A
JPS54137984A JP4612078A JP4612078A JPS54137984A JP S54137984 A JPS54137984 A JP S54137984A JP 4612078 A JP4612078 A JP 4612078A JP 4612078 A JP4612078 A JP 4612078A JP S54137984 A JPS54137984 A JP S54137984A
Authority
JP
Japan
Prior art keywords
film
gate
poly
double
oxidized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4612078A
Other languages
Japanese (ja)
Other versions
JPS6153869B2 (en
Inventor
Keizo Sakiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP4612078A priority Critical patent/JPS54137984A/en
Publication of JPS54137984A publication Critical patent/JPS54137984A/en
Publication of JPS6153869B2 publication Critical patent/JPS6153869B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To stop the injection of impurities into a single gate by forming a thick oxidized film by previously providing an oxidation preventive film onto a poly-Si film on the gate region of a double gate part at the time of the positioning of the 1st poly-Si film, in a device with both double and single gate MOSs built in the same chip. CONSTITUTION:On substrate 10, thin oxidized film 11, poly-Si12, and Si3N413 are stacked, film 13 is etched by a mask of SiO214, and layer 12 is oxidized selectively. Film 13 is removed and this oxidized film is etched and removed completely at the double-gate part and with the thick film left at the single-gate part, thereby preventing the immersion of N-type impurities. Next, N<+> ions are injected by mask 15. Mask 15 is removed, thin oxidized film 16 and the 2nd poly-Si film 17 are stacked, and film 17 is selectively etched to form control gate 17 and gate 17'. Then, N-type ions are injected to make layers 17 and 17' into wiring bodies and N<+>-type layers 18 and 18' and 19 and 19' are made, thereby completing the device. In the above method, characteristics of both double and single gate MOSs never deteriorate, so that the device of high quality can be obtained.
JP4612078A 1978-04-18 1978-04-18 Manufacture of floating gate mos semiconductor device Granted JPS54137984A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4612078A JPS54137984A (en) 1978-04-18 1978-04-18 Manufacture of floating gate mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4612078A JPS54137984A (en) 1978-04-18 1978-04-18 Manufacture of floating gate mos semiconductor device

Publications (2)

Publication Number Publication Date
JPS54137984A true JPS54137984A (en) 1979-10-26
JPS6153869B2 JPS6153869B2 (en) 1986-11-19

Family

ID=12738124

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4612078A Granted JPS54137984A (en) 1978-04-18 1978-04-18 Manufacture of floating gate mos semiconductor device

Country Status (1)

Country Link
JP (1) JPS54137984A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116670A (en) * 1980-02-20 1981-09-12 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7037804B2 (en) 2018-01-15 2022-03-17 国立大学法人広島大学 Power generators and automobiles

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116670A (en) * 1980-02-20 1981-09-12 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof

Also Published As

Publication number Publication date
JPS6153869B2 (en) 1986-11-19

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