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JPS54122914A - Radio receiver of pll frequency synthesizer system - Google Patents

Radio receiver of pll frequency synthesizer system

Info

Publication number
JPS54122914A
JPS54122914A JP3082078A JP3082078A JPS54122914A JP S54122914 A JPS54122914 A JP S54122914A JP 3082078 A JP3082078 A JP 3082078A JP 3082078 A JP3082078 A JP 3082078A JP S54122914 A JPS54122914 A JP S54122914A
Authority
JP
Japan
Prior art keywords
frequency
output
circuit
intermediate frequency
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3082078A
Other languages
Japanese (ja)
Inventor
Mitsuzo Shimomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP3082078A priority Critical patent/JPS54122914A/en
Publication of JPS54122914A publication Critical patent/JPS54122914A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)

Abstract

PURPOSE:To give freedom to the selection of the intermediate frequency filter, by controlling the frequency of the voltage controlled oscillator, through the change in the value of the variable frequency divider based on the result of measurement counting the intermediate frequency. CONSTITUTION:In the radio receiver of PLL frequency synthesizer system which uses the oscillation frequency of the voltage controlled oscillator VCO7 as the local oscillation frequency, a part of the output of the intermediate frequency amplifying circuit 3 is inputted to the frequency counter 12 with the output of the crystal oscillator 10 via the detector circuit 4, and the output of the intermediate frequency data signal generating circuit 14 connected to the intermediate frequency setting data input terminal 15 is fed to the counter 12. Further, up or down count is made with the counter 12, phase comparison is made at the phase comparison circuit 11 for the result of count and the output of the coded reception frequency data signal generating circuit 13, the frequency dividing ratio of the circuit 8 is changed by feeding the output to the variable frequency dividing circuit 8, and the frequency of VCO 7 is controlled with the output.
JP3082078A 1978-03-16 1978-03-16 Radio receiver of pll frequency synthesizer system Pending JPS54122914A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3082078A JPS54122914A (en) 1978-03-16 1978-03-16 Radio receiver of pll frequency synthesizer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3082078A JPS54122914A (en) 1978-03-16 1978-03-16 Radio receiver of pll frequency synthesizer system

Publications (1)

Publication Number Publication Date
JPS54122914A true JPS54122914A (en) 1979-09-22

Family

ID=12314334

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3082078A Pending JPS54122914A (en) 1978-03-16 1978-03-16 Radio receiver of pll frequency synthesizer system

Country Status (1)

Country Link
JP (1) JPS54122914A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03112206A (en) * 1989-09-26 1991-05-13 Nippon Denki Musen Denshi Kk Fm demodulator
JPH03112205A (en) * 1989-09-26 1991-05-13 Nippon Denki Musen Denshi Kk Fm demodulator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03112206A (en) * 1989-09-26 1991-05-13 Nippon Denki Musen Denshi Kk Fm demodulator
JPH03112205A (en) * 1989-09-26 1991-05-13 Nippon Denki Musen Denshi Kk Fm demodulator

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