JPS54111287A - Resin seal planar-structure semiconductor element - Google Patents
Resin seal planar-structure semiconductor elementInfo
- Publication number
- JPS54111287A JPS54111287A JP1883378A JP1883378A JPS54111287A JP S54111287 A JPS54111287 A JP S54111287A JP 1883378 A JP1883378 A JP 1883378A JP 1883378 A JP1883378 A JP 1883378A JP S54111287 A JPS54111287 A JP S54111287A
- Authority
- JP
- Japan
- Prior art keywords
- region
- type
- diffusion
- junction
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 239000011347 resin Substances 0.000 title 1
- 229920005989 resin Polymers 0.000 title 1
- 238000009792 diffusion process Methods 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- 239000011521 glass Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
- Formation Of Insulating Films (AREA)
Abstract
PURPOSE:To stabilize the dielectric strength of a planar-structure element with extending a space charge region at a stop voltage applying time to PN junction to make a surface potential gradient low by forming the same conductive-type additional region surrounding the outside of the base region which is provided on a semiconductor substrate. CONSTITUTION:An oxide film is used as a mask to form P-type base region 2 on N-type Si substrate 1, which becomes a collector region, by diffusion, and further, two P-type additional regions 7 and 8 are formed in both sides of region 2 surrounding region 2 by diffusion. Next, N<+>-type region 3 and N<+>-type layer 4 are formed in region 2 and on all the reverse face of substrate 1 respectively by diffusion, and the surface exposed part of the PN junction between regions 2 and 3 is covered with oxide film 10, and the outside circumference surface of it is protected by glass film 9. By this constitution, when the stop voltage is applied to the PN junction between collector region 1 and base region 2, the space charge region is extended and the surface potential gradient is lowered to improve the surface dielectric strength because additional regions 7 and 8 exist.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1883378A JPS54111287A (en) | 1978-02-21 | 1978-02-21 | Resin seal planar-structure semiconductor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1883378A JPS54111287A (en) | 1978-02-21 | 1978-02-21 | Resin seal planar-structure semiconductor element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54111287A true JPS54111287A (en) | 1979-08-31 |
Family
ID=11982555
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1883378A Pending JPS54111287A (en) | 1978-02-21 | 1978-02-21 | Resin seal planar-structure semiconductor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54111287A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56165353A (en) * | 1980-05-26 | 1981-12-18 | Nec Corp | Semiconductor device |
JPS5780765A (en) * | 1980-11-07 | 1982-05-20 | Toshiba Corp | Semiconductor device |
JPS5795664A (en) * | 1980-12-05 | 1982-06-14 | Toshiba Corp | Semiconductor device |
JPS57132356A (en) * | 1981-02-09 | 1982-08-16 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
-
1978
- 1978-02-21 JP JP1883378A patent/JPS54111287A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56165353A (en) * | 1980-05-26 | 1981-12-18 | Nec Corp | Semiconductor device |
JPS5780765A (en) * | 1980-11-07 | 1982-05-20 | Toshiba Corp | Semiconductor device |
JPS5795664A (en) * | 1980-12-05 | 1982-06-14 | Toshiba Corp | Semiconductor device |
JPS57132356A (en) * | 1981-02-09 | 1982-08-16 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
JPH0120544B2 (en) * | 1981-02-09 | 1989-04-17 | Mitsubishi Electric Corp |
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