JPH11338908A - Circuit information display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make only required information possible to be edited and displayed without using logical information for logical operation confirmation and mounting information like a drawing for production as they are by designating display information out of three kinds of information in the case that three kinds of information cannot be displayed in one display picture. SOLUTION: A logic circuit diagram, a mounting diagram, and a net list are not displayed in a picture in the initial state. A menu for election of display information, a display level indicating up to which stage elements should be displayed, a mode for indication of erase, reduction, enlargement, or the like of the picture, indication contents as a column indicating an element to be the center of display, element positions, XY coordinates, etc., are displayed there. A test engineer 24 inputs required information to VDT 45 having this initial stage by keys. Assuming that it is displayed on a display device 21 of a tester 23 that the operation of a pin of parts is different from the normal operation, the element position is picked up with a mouse in a selection display column, and indication contents are inputted with keys.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to logic information such as a logic circuit diagram and a net list, mounting information such as a component layout diagram, a print pattern diagram, a through-hole layout diagram, and a test pad layout diagram, and the positions of test terminals. / Circuit information display device that displays test information such as identifiers on the display means such as a display (especially, these are referred to as circuit information). In particular, failures occur during design / manufacture of boards and elements and during operation tests. The present invention relates to an analysis assisting device or a circuit information display device suitable for checking circuit change information such as a print pattern cut position and a jumper line position when a design change occurs.

[0002]

2. Description of the Related Art As a technique for displaying and editing a graphic on a display screen, as disclosed in Japanese Patent Application Laid-Open No. 1-223487, "Graph Display System and Graphic Display Method",
There are techniques for optimizing a display update process in a predetermined drawing unit and a method for realizing a good user interface related to a display update.

Further, in the technique described in Japanese Patent Application Laid-Open No. 63-140594, "Printed Circuit Board Pattern Display Device", display is performed when interlayer holes that connect layers, which are not through holes of a printed circuit board, are located at the same position. The method is described.

However, in these techniques, no consideration is given to a means for displaying a display range from a specified element to a specified number of levels according to the connection relation of the elements.

Further, no consideration is given to means for displaying test information in combination with other circuit information.

[0006]

In the above-mentioned prior art, since the display is performed in drawing units, a logical circuit diagram and a component arrangement diagram displayed on a display screen are taken into account in accordance with a user's designation and in consideration of circuit connection relations. No consideration has been given to the means of editing and displaying.

Further, no means has been considered for displaying test information such as probe pin information of a tester on a logic circuit diagram, component layout diagram, or print pattern diagram.

For this reason, when an abnormal phenomenon occurs during test debugging or test execution, all the logic circuit diagrams and component arrangement drawings relating to the printed circuit board to be tested are placed on the tester side, and from the failure position indicated by the tester. Then, a part or an abnormal portion of the print pattern which caused the problem was searched for.

However, since the related parts are often divided into a number of drawings, the logic is traced on a number of logic circuit diagrams, and the open / short positions of the patterns are determined on the printed pattern diagram. I needed to track.

[0010] For this reason, the test engineer has to spend a lot of time and effort for analysis.

As described above, the above prior art does not consider the ease of debugging at the time of test and design of a printed circuit board, and it takes a long time to test and debug the printed circuit board, and the It was a heavy burden.

Accordingly, the present invention provides a circuit diagram, a component layout diagram,
Another object of the present invention is to provide a circuit information display device that can edit and display only necessary information without using logic information for confirming a logical operation or mounting information such as a manufacturing drawing as it is as in a printed pattern diagram. And

[0013]

To solve the above-mentioned problems, the present invention provides a designating means for receiving designation information for designating an instruction to create logical information and mounting information; Editing means for editing circuit information for creating logical information and mounting information,
Display means for displaying logic information and mounting information created based on the circuit information edited by the editing means, wherein the designation means includes three kinds of information of logic information, mounting information and test information of the circuit. Means for receiving information designating display on one display screen, and when the three types of information cannot be displayed on one display screen of the display means, display information is selected from the three types of information. And a means for receiving information for designating the circuit information.

[0014]

[Action] The designating means designates display information, and the editing means designates display information.
The circuit information is edited according to the designated information and output to the display means, and the display means displays the edited information.

The editing means edits at least one of the logic information, the mounting information, and the test information of the circuit so as to display a part or all of the information constituting the information on the display means. The information is displayed and edited based on the connection relation of the circuits.

When the editing means edits the logic information and the test information or the mounting information and the test information by superimposing them on the same display screen, the test information and other information are superimposed and displayed in the display means. Therefore, it is easy to search for a test location.

[0017]

Embodiments of the present invention will be described below with reference to the accompanying drawings.

FIG. 1A is a block diagram of a circuit information display device constituting the present invention.

The workstation 4 which is a circuit information display device according to the present invention has a keyboard (KB) as a designating means.
Alternatively, a pointing device (MUS), an operation unit 42 as an editing unit, and a display unit (VDT) 45 as a display unit
And an external storage unit 44 for storing logic information, mounting information, test information, and a program, and an internal memory 43 for storing a program executed by the operation unit.

FIG. 1B is an explanatory diagram of the entire system including the workstation 4 used in circuit design and test.

This system includes a host computer 2 for circuit design for a designer to create the above information used by the workstation 4, a design database 3 for storing the above information created by the host computer, and a host computer. It has a workstation 4 connected to the computer 2 via a communication line or the like, and an in-circuit tester 23 for testing a manufactured printed circuit board 30 to be tested.

In this figure, a test engineer 24 places a print substrate 30 to be tested on a test jig 22 and
The place where the user is working while looking at the display 21 is shown.

For this system, a circuit design procedure,
The procedure for creating logical information / mounting information and the procedure for testing are described.

The host computer 2 externally inputs the logic circuit diagram 1 of the test target board, performs a logic simulation on the logic circuit diagram, and checks the validity of the logic.

Next, the components 310, 311, 36 mounted on the printed circuit board 30 according to the confirmed logic circuit.
0, 361, 370, and print patterns 340 to 343, 350 to 35 connecting these components.
2, the positions of the through holes 320 to 323 and the test pad 38 are determined.

FIGS. 2A and 2B show diagrams after the determination.

FIG. 2A is a plan view of the printed circuit board 30, and FIG. 2B is an explanatory diagram showing a cross section of the printed circuit board 30.

Here, the components 310 and 311 are component pin insertion type components mounted on the surface of the printed circuit board 30, and the components 360 and 361 are surface mounted components mounted on the surface of the printed circuit board 30. The component 370 is a surface-mounted component mounted on the back surface of the printed circuit board 30. The test pad 380 is a test pad that is specially provided when the surface mount components are not connected directly to the pins of the tester when the surface mount components are connected to each other by a printed pattern.

The logical information and the mounting information of the printed circuit board 30 to be tested thus determined are stored in the design database 3 of the host computer 2.

Next, the printed circuit board 30 to be tested is
Is performed by the in-circuit tester 23.

Before conducting the test, the test engineer 24
Performs an operation for extracting data of the print substrate 30 to be tested from the VDT 45 of the workstation 4 arranged near the in-circuit tester 23.

By performing this operation, the logic information and the mounting information of the test target printed circuit board 30 registered in the design database 3 of the host computer 2 are transferred to the workstation 4 online.

At this time, if the information registered in the design database 3 of the host computer 2 is transferred to the workstation 4 as it is, there is a lot of information unnecessary for failure analysis. Host computer 2 to reduce capacity and improve access speed
Is converted into the table structure shown in FIG.

Here, the element shape table 520 and the IC shape table 525 are resident as library information on the workstation 4.

Here, the pin numbers 501 of the logical connection information table 500 correspond to the print patterns 340 to 343, 3
At 50 to 352, the pin numbers of ICs connected to the same potential are recorded. In addition, the input / output section 502 has a
It indicates whether it is an input or an output,
The net number 503 is for indicating the distinction between the same potential series, and the IC table pointer 504 is a pointer indicating the IC information table 510.

In the IC information table 510, a mounting position 511, an IC name 512 and the like are described in order to know detailed information of components mounted on the printed circuit board 30.

The pattern table 530 is designed to accurately represent the running state of the print pattern.

This is the coordinates 53 on the printed circuit board 30.
1, 532 to which print pattern 3
Information as to whether 40 to 343 and 350 to 352 are traveling and the end point is a hole type 535 for judging whether it is a through hole, a test pad, or a simple bend point.
Information.

At this time, the print substrate 30 to be tested is
Is set on a test jig 22, and a test engineer 24 tests and debugs the print substrate 30.

When an abnormal phenomenon is detected during the test and debugging of the printed circuit board 30, a message of the abnormal content and the printed circuit board 30 are displayed on the display 21 of the in-circuit tester 23 in accordance with the contents of the abnormal phenomenon.
The upper position, for example, the XY coordinates and the mounting position of the IC are displayed.

Next, the operation of the workstation 4 according to the present embodiment will be described for the case where the above abnormal phenomenon occurs.

The test engineer 24 inputs the information displayed on the tester 23 from the KB of the work station 4 by a key in order to investigate the cause of the occurrence of the abnormal phenomenon.

The key input will be described with reference to FIG.

The screen in the initial state includes a logic circuit diagram 400,
The mounting diagram 401 and the netlist 402 are not displayed. Displayed on the screen are a menu 413 for selecting information to be displayed, a display level 423 for indicating how many levels of elements to display, and a mode 426 for instructing the screen to erase, reduce, enlarge, and the like. , An instruction content 414 which is a column for designating an element serving as a display center, an element position, XY coordinates,
This is a display field 434 for selecting a node number.

The test engineer 24 inputs necessary information to the VDT 45 having the initial state by keying.

The component I1 is displayed on the display 21 of the tester 23.
Assuming that the operation of the 1 pin of 0 is different from the normal operation, the test engineer 24 turns to the VDT 45, picks up the element position with the mouse 8 in the selection display field 434, and sets the instruction content 424 to 'I10.1 'Key.

Next, “I1” specified by the instruction content 424
A display level indicating the number of layers to be displayed centering on the element of 0 'is key-inputted into the hierarchy instruction column 421 of the display level 423.

At the time of the initial input, the menu 413 and the mode 426 need not be operated. At the time of initial input, the menu 413 operates on the assumption that three types of logic circuit diagram, mounting diagram, and netlist are specified. If instructed, only those instructed are displayed.

In the mode 426, erasing cannot be performed at the time of initial input. If this is designated, a warning message is output because a selection error with another item is considered.

The flow of processing performed in the workstation 4 will be described with reference to FIGS.

FIG. 6 shows the overall flow.

From the VTD 45 of the workstation 4,
When the program according to the present invention is started (S700), control is transferred to the initial setting mode module (S701), and a menu screen is displayed.

Step S701 will be described with reference to FIG.

First, the fields 403 and 404 shown in FIG. 3 are displayed (S810).

The information keyed in this state is:
The level 614 indicating the current display level and the mode 615 indicating the current display mode in the command menu table 610 shown in FIG. 5A, the instruction reference name 630 in the instruction content table 650 shown in FIG. The content is set to the content 640 (S811).

If the display mode is other than the erase mode, the flow shifts to S702. If the display mode is the erase mode, a key input error is displayed (S803), and the process returns to the beginning of the initial setting mode (S701).

The processing up to this point is performed by the initialization mode module.

Next, control is transferred to the display mode module.
(S702).

FIG. 7B shows an outline of this processing.

First, in the mode 615 column of the logic circuit diagram 611 of the command menu table 610, it is checked whether or not there is a logic circuit diagram display instruction. A logical circuit diagram is created in the virtual space of the workstation by the virtual space creation module (S801). If there is no instruction, the process proceeds to a process without an instruction (S806).

In the logic circuit diagram editing, the position of the logic circuit symbol on the drawing of the logic circuit diagram 1 inputted by the host computer 2 is completely ignored, and the information of the element, the coordinate information, the node According to the information, the information is edited and output as much as possible on one screen.

When the image cannot be displayed on one screen, the creation module also has a function of displaying the part hidden on the screen by closing the screen.

Next, display processing of mounting information is performed (S8).
02).

At this time, similarly to the logic circuit diagram display,
The contents of the logical connection information table 500, the IC information table 510, and the pattern table 530 are edited and displayed with reference to the level 614 and the mode 615 written in the mounting diagram 612 column of the command menu table 610.

At this time, unlike the case where the logic circuit diagram virtual space creation module creates a display screen ignoring the symbol arrangement of the logic circuit diagram 1, the relative arrangement state is basically displayed in actual dimensions. .

In this case, if the image cannot be displayed on the screen, a mode 426 for screen editing is used by using the reduction / enlargement function.
An optimum display size is created in the screen display virtual space.

If there is a display instruction, the net list display module also displays the net according to the contents of the menu table 610, the instruction reference name 630 and the instruction contents 640 of the instruction contents table 650, and the contents of the logical connection information table 500 according to the screen virtual. The data is edited and output to the space (S804).

Since a logical circuit diagram virtual space, a mounting information virtual space, and a netlist virtual space are completed by this series of processing, these virtual space screen information are displayed on the VDT 45 of the workstation 4 by the display display module ( S805).

The screen information thus displayed is shown in FIG.
Shown in

A logic circuit diagram 400 expanded in one layer around I10, mounting information 401, and a net list 402 are displayed on one screen.

The description of FIG. 7 has been completed.
Will be described.

This corresponds to the logic circuit diagram 4 shown in FIG.
When it is desired to change the display contents of the mounting information 401, the mounting information 401, and the net list 402, instructions such as enlargement, reduction, deletion, and change of the display level are given to the user instruction command areas 403 and 404.

Such an instruction is taken into the level 621 and the mode 622 which are columns indicating the level and mode of the editing request in the command menu table 610 (S703).

Next, it is checked whether or not there is a change between the current display level 614, the mode 615 information, and the current edition information. The instruction reference name 630 and the instruction content 640 are also compared with 631 and 641 to check whether there is any change.

As a result, if there is no change (S707), there is a possibility of an instruction error of the test engineer 24, so the process proceeds to FIG. 6 without change and calls an output module for outputting an instruction error message (S708). The process returns to the editing instruction capturing module again.

When the instruction state has changed from the previous instruction state (S70)
6) is an end instruction (S710) or another instruction (S70).
Determine 9). In the case of a termination instruction, all processing according to the present invention is terminated.

If there is another instruction, the current display level 614 of the command menu table 610 and the mode 6
15, the editing content level 621 and the mode 622 are transferred.

The instruction content table 650 shown in FIG.
The current instruction reference name 630, instruction content 640 631,
Column 641 is also rewritten.

When these processes are completed, the process returns to the process of the display mode module again (S702).

Another embodiment will be described with reference to FIGS.

In this embodiment, a plurality of VDTs, for example, three VDTs 45 are connected to a single workstation 4 as a plurality of display devices.

When the device configuration shown in FIG. 8 is adopted, one type of diagram can be displayed by one VDT, or another circuit position of the printed circuit board to be tested can be displayed on separate screens. Become.

In order to realize this, the table configuration shown in FIG. 9 may be employed. In this case, the editing and instruction information displayed on the VDT 45 is as shown in FIG. This figure differs from FIG. 3 in that the VDT number 101 in FIG. 10 exists in the user designated area.

Further, in the processing flow of FIG. 6, no special processing is required except for the consideration of the display end unnumbered number in the initial setting mode module and the consideration of the VDT number when the editing instruction is fetched. do not do.

Since the present invention is configured as described above, the following can be realized.

The logical design information and mounting design information of the target printed circuit board are developed on the memory of the computer (or workstation), and the mounting position and parts information designated by an external keyboard or mouse are taken into the computer. Tracks logic related to parts specified externally. Further, related print pattern information, component arrangement information, logic circuit diagram information, and logical connection information can be displayed on the VDT screen of the computer.

For this reason, instead of directly using logic information for confirming a logical operation such as a circuit diagram, a component layout diagram, or a print pattern diagram, or mounting information such as a drawing for manufacturing,
A circuit information display device that can edit and display only necessary information can be provided.

In the logic circuit diagram, the names of components, functions, component pin numbers, and mounting positions can be displayed.

If the logic circuit diagram is used for a design change, the logic circuit diagram after the change and the logic circuit diagram before the change can be displayed side by side so that they can be compared.

When displaying a logic circuit diagram, a component layout diagram, and a netlist for use in a logic change process of a printed board, a print pattern cut position and a jumper wire connection position are displayed in the drawing information. You can also.

The logical information obtained by tracing can be output as a netlist.

The component layout diagram and the print pattern diagram show mounting information including the name of the component IC, mounting position, XY coordinates, mounting direction, etc., and where and in which direction the print pattern runs on the printed circuit board. XY coordinate information and through holes existing on the print pattern,
It can be output by editing XY coordinate information indicating the position of the test pad.

At this time, in order to simplify the operation of a worker who performs a failure analysis and a design change, a plurality of screen information is simultaneously displayed (hereinafter, referred to as a multi-screen) as information to be displayed.
The ability to zoom in or out on any drawing,
Among them, a function of enlarging or reducing the screen of one or more pieces of designated information or a function of scrolling one or more pieces of designated information can be provided.

For enlargement or reduction of a drawing, by preparing a virtual space drawing corresponding to each magnification, it is possible to select and display a drawing suitable for a hierarchy specified from the outside.

When all pieces of information cannot be displayed, the user can specify the information to be displayed from among these pieces of information and display the specified information.

When a logic circuit diagram is displayed, in order to find out the cause of a failure more smoothly, a component designated from the outside is the center, and logic circuit information to be connected to the component is arranged at an arbitrary level designated by the user. It can also be displayed.

As the display hierarchy increases, the number of symbols displayed in one screen increases, and since the area that can be displayed on one screen is constant, the drawing in the virtual drawing area increases as the display hierarchy increases. The display magnification can be reduced to fit on one screen.

The component layout diagram and the print pattern diagram can also be displayed in a drawing according to the hierarchy specified from the outside similarly to the logic circuit diagram.

At this time, it is also possible to edit the display so that the actual positional relationship is maintained and displayed.

Further, in order to more easily analyze a failure of a board having components mounted on both sides, when displaying a component layout diagram, a logic circuit diagram, or a printed pattern diagram, the printed circuit board to be tested must be attached to the front side. The mounted components and print patterns can be displayed in a different display form on the display screen than those mounted on the back side.

Here, changing the display mode means changing the color, shape or luminance, or blinking.

The display form of the circuit on the front side and the net on the back side can be changed for the logic circuit net list.

The display mode can be changed according to the type of the element to be displayed, the print pattern, the test probe, or the like.

When a specific net is selected on the netlist, the luminance of the element or print pattern related to the net is displayed on another part of the logic circuit diagram or mounting diagram to highlight it. It is also possible to select any one of the following: display by changing, flashing display, or flashing by changing brightness. Further, other display modes may be selectable.

For the net selected in the netlist display field, the brightness of a series of connections consisting of the corresponding parts on the logic circuit diagram, the printed pattern, through holes, and test pads, and other display modes are shown. Can be displayed instead of

When the hierarchical display of different types of drawings displayed on the multi-screen is changed in order to further improve the operability, the hierarchical display of other drawings is changed in synchronization with the change. it can.

Also, in a test using an in-circuit tester, a lot of time is spent to check the position of a probe pin for sending a test signal on a print pattern during the test.

For this reason, mounting information such as a component layout diagram and a printed pattern diagram showing the positions of elements, element pins, test pads, and through holes on the VDT screen and test information such as probe pin pin positions are superimposed. They can also be displayed together.

Further, the logical information and the test information can be superimposed and displayed.

Therefore, at the same time as the logical information and the mounting information,
A circuit information display device capable of displaying test information can be provided.

As a pin setting position, there is also a test pad.

The test pad is used in some cases where the surface mount components are frequently used on a high-density substrate, or when both sides are mounted on a printed circuit board, the probe pins may not be able to be directly set on the component pins. For this reason, a test pad is provided in the middle of the print pattern, a probe pin is set up for this, and a test signal is supplied. When confirming these pin positions, the position information has a great effect.

At this time, in order to make it easy to confirm the position, the display mode such as the shape or color of the test pad can be changed and displayed.

Similarly, identification of the through-hole can be facilitated by changing the display mode such as the shape or color of the through-hole.

Since the use pins and the shape of the probe pins used here are different from each other, the power pins, the earth pins, and the like can be easily recognized on the VDT screen.
The signal pins can also be displayed in different display modes such as shape, color or luminance.

At this time, if the probe pin number, which is one of the identifiers of the probe pins, is also displayed at the same time, the work efficiency is further improved.

When displaying a logic circuit diagram for use in failure analysis of a printed circuit board, a probe pin is displayed on a line segment representing a net in the logic circuit diagram, and at this time, an actual probe pin stands. It can also be displayed near the element closest to the location.

When the VDT display screen is small and it is difficult to see it on a multi-screen, a plurality of displays are prepared in the workstation, and each of them is provided with a logical circuit diagram, a component layout diagram, and a print pattern diagram. Different information can be displayed.

In order to easily check the connection status of the print patterns, only the print patterns, test pads, and through holes relating to the elements or components specified from the outside should be displayed on the component layout. Can also.

Since the present invention can be provided with the functions described above, according to the present invention, when performing a failure analysis, it is possible to easily observe, in a short time, the relationship among circuits, components, and print patterns related to the abnormal phenomenon pointed out by the tester. Therefore, it is possible to shorten the failure analysis time of the test engineer.

Further, since it is not necessary to prepare a logic circuit diagram, a mounting diagram, and a print pattern diagram as a drawing sheet, the test station can be widely used at the time of test debugging or failure analysis.

In this embodiment, as shown in FIG. 3, the designated element is displayed at the center of the screen, but the designated element is arranged at the right end of the screen (at this time, The purpose is to display the element connected to the input side of the element) or to display the specified element at the left end of the screen (in this case, the element connected to the output side of the element is displayed). (For the purpose of displaying) may be selected by the specifying means.

It is also possible to designate elements and elements and display only those elements or print patterns which have a connection relationship between them.

Further, an element and a specific place (for example, an external input / output pin or the like) may be designated, and only elements or print patterns having a connection relationship therebetween may be displayed.

[0125]

As described above, according to the present invention, according to the present invention, logic information for confirming a logical operation such as a circuit diagram, a component layout diagram or a printed pattern diagram, and mounting information such as a manufacturing drawing are provided. It is possible to provide a circuit information display device that edits and displays only necessary information instead of using it as it is.

[Brief description of the drawings]

FIG. 1 is a block diagram according to an embodiment of the present invention.

FIG. 2A is a plan view of a printed circuit board to which the present invention is applied, and FIG. 2B is a sectional view taken along the line II of FIG. It is.

FIG. 3 is an explanatory diagram of a VDT screen of a workstation according to the present invention.

FIG. 4 is an explanatory diagram of a logic and mounting information table of a printed circuit board stored on a workstation.

FIG. 5 (a) is a diagram illustrating a case where a user operates a VDT of a workstation.
FIG. 7B is an explanatory diagram of a command menu table which is one of tables for storing information input from a VDT of a workstation. FIG. FIG.

FIG. 6 is an explanatory diagram of software processing according to an embodiment of the present invention.

FIG. 7 is an explanatory diagram of a process for editing a display screen according to an embodiment of the present invention.

FIG. 8 is a block diagram of an embodiment in which three VDTs are connected to one workstation.

FIG. 9 is an explanatory diagram of a table of user instruction information for displaying a screen with the device configuration of FIG. 8;

FIG. 10 is an explanatory diagram of a user instruction information screen at the time of the device configuration of FIG. 8;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Logic circuit diagram 2 ... Host computer 3 ... Design database 4 ... Work station 23 ... In-circuit tester 30 ... Print board 320 ... Through hole 340 ... Print pattern 360 ... Parts 400 ... Logic circuit diagram 401 ... Mounting Figure 402: Netlist 403: User command area

Claims (7)

[Claims] 1. A designating means for receiving designation information for designating an instruction to create logical information and mounting information, and editing circuit information for creating logical information and mounting information according to the information received by the designating means. Editing means, and display means for displaying logic information and mounting information created based on the circuit information edited by the editing means, wherein the designating means includes the logic information of the circuit, the mounting information, and the test information. Means for receiving information designating the display of three types of information in one display screen; and when the three types of information cannot be displayed in one display screen of the display means, the three types of information Means for receiving information for designating display information from among the information. 2. Designing means for receiving designation information for designating an instruction to create logical information and mounting information, and editing circuit information for creating logical information and mounting information according to the information received by the designating means. Editing means, and display means for displaying logic information and mounting information created based on the circuit information edited by the editing means, wherein the editing means is arranged on one of the component mounting surfaces. A circuit information display device, wherein a constituent element and a constituent element arranged on another surface are edited in different display modes. 3. Designing means for receiving designation information for designating an instruction to create logical information and mounting information, and editing circuit information for creating logical information and mounting information according to the information received by the specifying means. Editing means, and display means for displaying logic information and mounting information created based on the circuit information edited by the editing means, wherein the specifying means specifies a display mode according to the type of display target. A circuit information display device capable of receiving information to be performed. 4. A designating means for receiving designation information for designating an instruction to create logical information and mounting information, and editing circuit information for creating logical information and mounting information according to the information received by the designating means. Editing means, and display means for displaying logic information and mounting information created based on the circuit information edited by the editing means. The editing means performs a test in accordance with the shape and type of the test terminal. A circuit information display device characterized by changing a display mode of a terminal. 5. A designating means for receiving designation information for designating an instruction to create logical information and mounting information, and editing circuit information for creating logical information and mounting information according to the information received by the designating means. Editing means, and display means for displaying logic information and mounting information created based on the circuit information edited by the editing means, wherein the designation means receives the designation information including designation of components. The circuit information display device, wherein the editing means performs editing so that only the elements other than the elements connected to the designated component are displayed on the display means. 6. A designating means for receiving designation information for designating an instruction to create logical information and mounting information, and editing circuit information for creating logical information and mounting information according to the information received by the designating means. Editing means, and display means for displaying logic information and mounting information created based on the circuit information edited by the editing means, wherein the designating means comprises a net indicating connection information between elements. Receiving the designation information including designation of one net, the editing means stores logic information and mounting information, and emphasizes information related to the designated net from the logic information and mounting information; A circuit information display device for displaying. 7. A designating means for receiving designation information for designating an instruction to create logical information and mounting information, and edits circuit information for creating logical information and mounting information according to the information received by the designating means. Editing means, and display means for displaying logic information and mounting information created based on the circuit information edited by the editing means, wherein the editing means includes logic information, mounting information, and circuit change information of the circuit. Wherein the circuit change information is edited so as to be superimposed and displayed on the same display screen as the logical information or the mounting information.